Simulation Results: kmac/unmasked

 
22/07/2026 19:39:31 DVSim: v1.50.0 sha: a22166c json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 78.38 %
  • code
  • 65.56 %
  • assert
  • 95.62 %
  • func
  • 73.96 %
  • line
  • 92.97 %
  • branch
  • 87.74 %
  • cond
  • 83.25 %
  • toggle
  • 27.32 %
  • FSM
  • 36.50 %
Validation stages
V1
100.00%
V2
72.41%
V2S
75.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 28.120s 11967.813us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.140s 121.891us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.840s 70.482us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 8.100s 1425.642us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 7.350s 1032.729us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 2.790s 84.758us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.840s 70.482us 1 1 100.00
kmac_csr_aliasing 7.350s 1032.729us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.870s 19.562us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.100s 35.773us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 3436.700s 1312230.121us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 275.060s 26925.855us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1392.700s 27226.270us 1 1 100.00
kmac_test_vectors_sha3_256 1989.300s 429319.570us 1 1 100.00
kmac_test_vectors_sha3_384 29.080s 18825.141us 1 1 100.00
kmac_test_vectors_sha3_512 14.750s 1941.759us 1 1 100.00
kmac_test_vectors_shake_128 2552.880s 533281.510us 1 1 100.00
kmac_test_vectors_shake_256 237.920s 28539.065us 1 1 100.00
kmac_test_vectors_kmac 2.450s 79.868us 1 1 100.00
kmac_test_vectors_kmac_xof 2.490s 140.052us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 254.580s 28468.842us 1 1 100.00
app 0 1 0.00
kmac_app 4.900s 126.566us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 5.350s 141.236us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 6.210s 476.070us 0 1 0.00
error 1 1 100.00
kmac_error 12.570s 8483.457us 1 1 100.00
key_error 0 1 0.00
kmac_key_error 0.800s 10.422us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 1.010s 10.315us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 30.060s 11054.555us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 21.160s 1050.531us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.930s 24.380us 0 1 0.00
lc_escalation 0 1 0.00
kmac_lc_escalation 0.790s 31.363us 0 1 0.00
stress_all 0 1 0.00
kmac_stress_all 9.610s 3410.131us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.920s 14.417us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 1.130s 76.641us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 1.310s 27.382us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 1.310s 27.382us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.140s 121.891us 1 1 100.00
kmac_csr_rw 0.840s 70.482us 1 1 100.00
kmac_csr_aliasing 7.350s 1032.729us 1 1 100.00
kmac_same_csr_outstanding 1.140s 98.974us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.140s 121.891us 1 1 100.00
kmac_csr_rw 0.840s 70.482us 1 1 100.00
kmac_csr_aliasing 7.350s 1032.729us 1 1 100.00
kmac_same_csr_outstanding 1.140s 98.974us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.410s 236.549us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.410s 236.549us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.410s 236.549us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.410s 236.549us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 3.100s 2343.651us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 30.930s 70413.210us 1 1 100.00
kmac_tl_intg_err 1.960s 192.228us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 1.960s 192.228us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 0 1 0.00
kmac_lc_escalation 0.790s 31.363us 0 1 0.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 28.120s 11967.813us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 254.580s 28468.842us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.410s 236.549us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 30.930s 70413.210us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 30.930s 70413.210us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 30.930s 70413.210us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 28.120s 11967.813us 1 1 100.00
sec_cm_fsm_global_esc 0 1 0.00
kmac_lc_escalation 0.790s 31.363us 0 1 0.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 30.930s 70413.210us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 7.560s 700.174us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 28.120s 11967.813us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 10.620s 1913.087us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 7 test runs
kmac_sideload_invalid 84486225169202405447756389755650766653467939392590166534198402982838960710948 79
UVM_INFO @ 10315162 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 22389878218776921814184420441236784120733443075798957632260943265402949873785 79
UVM_INFO @ 126565845 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 55387920221654155206076170390843018724112170603951302365293421604904879275148 79
UVM_INFO @ 141235677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 113258861625289448403726430342611545912064403887220494372164745229778909522152 81
UVM_INFO @ 476070146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 19147146209290408114757070329233013075479300499705555565353383830505018110002 77
UVM_INFO @ 24379662 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_lc_escalation 59277141890535881055351502136564156304329674389379821789985956908433299674476 77
UVM_INFO @ 31363292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 98396534762142714762545610248642762470476358124100761524665342357076732234557 90
UVM_INFO @ 3410130728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 2 test runs
kmac_mubi 100113556433830509433777322907273137414129673911154524047527782967649166366172 83
UVM_INFO @ 700174339 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 61476197813228210395350981738831832521700112586470171102844489933383482208319 156
UVM_INFO @ 1913087045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 25055178619665938463062600789060482345448451658093827516673559023113761842167 78
UVM_ERROR @ 10422493 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 10422493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---