Simulation Results: aes/gcm_unmasked

 
23/07/2026 19:40:32 DVSim: v1.50.0 sha: 40dffb6 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 84.35 %
  • code
  • 90.94 %
  • assert
  • 97.75 %
  • func
  • 64.35 %
  • block
  • 90.43 %
  • line
  • 92.48 %
  • branch
  • 82.52 %
  • toggle
  • 97.99 %
  • FSM
  • 90.78 %
Validation stages
V1
100.00%
V2
100.00%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 67.185us 1 1 100.00
smoke 1 1 100.00
aes_smoke 2.000s 94.930us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 86.435us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 2.000s 69.773us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 5.000s 323.351us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 3.000s 247.222us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 75.229us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 2.000s 69.773us 1 1 100.00
aes_csr_aliasing 3.000s 247.222us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 2.000s 94.930us 1 1 100.00
aes_config_error 2.000s 111.185us 1 1 100.00
aes_stress 1.000s 64.774us 1 1 100.00
key_length 3 3 100.00
aes_smoke 2.000s 94.930us 1 1 100.00
aes_config_error 2.000s 111.185us 1 1 100.00
aes_stress 1.000s 64.774us 1 1 100.00
back2back 2 2 100.00
aes_stress 1.000s 64.774us 1 1 100.00
aes_b2b 2.000s 80.287us 1 1 100.00
backpressure 1 1 100.00
aes_stress 1.000s 64.774us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 2.000s 94.930us 1 1 100.00
aes_config_error 2.000s 111.185us 1 1 100.00
aes_stress 1.000s 64.774us 1 1 100.00
aes_alert_reset 3.000s 144.426us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 83.014us 1 1 100.00
aes_config_error 2.000s 111.185us 1 1 100.00
aes_alert_reset 3.000s 144.426us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 2.000s 78.461us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 4.000s 348.647us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 3.000s 144.426us 1 1 100.00
stress 1 1 100.00
aes_stress 1.000s 64.774us 1 1 100.00
sideload 2 2 100.00
aes_stress 1.000s 64.774us 1 1 100.00
aes_sideload 2.000s 159.996us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 3.000s 67.384us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 11.000s 3244.969us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 1.000s 67.264us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 1.000s 92.088us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 1.000s 92.088us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 86.435us 1 1 100.00
aes_csr_rw 2.000s 69.773us 1 1 100.00
aes_csr_aliasing 3.000s 247.222us 1 1 100.00
aes_same_csr_outstanding 2.000s 136.602us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 86.435us 1 1 100.00
aes_csr_rw 2.000s 69.773us 1 1 100.00
aes_csr_aliasing 3.000s 247.222us 1 1 100.00
aes_same_csr_outstanding 2.000s 136.602us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 0 1 0.00
aes_reseed 2.000s 19.606us 0 1 0.00
fault_inject 2 3 66.67
aes_fi 3.000s 185.838us 0 1 0.00
aes_control_fi 1.000s 83.313us 1 1 100.00
aes_cipher_fi 2.000s 56.332us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 1.000s 115.472us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 1.000s 115.472us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 1.000s 115.472us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 1.000s 115.472us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 616.053us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 4.000s 931.864us 1 1 100.00
aes_tl_intg_err 2.000s 146.949us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 146.949us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 3.000s 144.426us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 1.000s 115.472us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 1.000s 115.472us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 2.000s 94.930us 1 1 100.00
aes_stress 1.000s 64.774us 1 1 100.00
aes_alert_reset 3.000s 144.426us 1 1 100.00
aes_core_fi 3.000s 525.488us 1 1 100.00
sec_cm_gcm_config_sparse 3 3 100.00
aes_config_error 2.000s 111.185us 1 1 100.00
aes_stress 1.000s 64.774us 1 1 100.00
aes_core_fi 3.000s 525.488us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 1.000s 115.472us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 64.224us 1 1 100.00
aes_stress 1.000s 64.774us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 1.000s 64.774us 1 1 100.00
aes_sideload 2.000s 159.996us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 64.224us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 64.224us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 64.224us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 64.224us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 64.224us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 1.000s 64.774us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 1.000s 64.774us 1 1 100.00
sec_cm_main_fsm_sparse 0 1 0.00
aes_fi 3.000s 185.838us 0 1 0.00
sec_cm_main_fsm_redun 3 4 75.00
aes_fi 3.000s 185.838us 0 1 0.00
aes_control_fi 1.000s 83.313us 1 1 100.00
aes_cipher_fi 2.000s 56.332us 1 1 100.00
aes_ctr_fi 2.000s 48.704us 1 1 100.00
sec_cm_cipher_fsm_sparse 0 1 0.00
aes_fi 3.000s 185.838us 0 1 0.00
sec_cm_cipher_fsm_redun 2 3 66.67
aes_fi 3.000s 185.838us 0 1 0.00
aes_control_fi 1.000s 83.313us 1 1 100.00
aes_cipher_fi 2.000s 56.332us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 56.332us 1 1 100.00
sec_cm_ctr_fsm_sparse 0 1 0.00
aes_fi 3.000s 185.838us 0 1 0.00
sec_cm_ctr_fsm_redun 2 3 66.67
aes_fi 3.000s 185.838us 0 1 0.00
aes_control_fi 1.000s 83.313us 1 1 100.00
aes_ctr_fi 2.000s 48.704us 1 1 100.00
sec_cm_ghash_fsm_sparse 0 1 0.00
aes_fi 3.000s 185.838us 0 1 0.00
sec_cm_ctrl_sparse 3 4 75.00
aes_fi 3.000s 185.838us 0 1 0.00
aes_control_fi 1.000s 83.313us 1 1 100.00
aes_cipher_fi 2.000s 56.332us 1 1 100.00
aes_ctr_fi 2.000s 48.704us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 3.000s 144.426us 1 1 100.00
sec_cm_main_fsm_local_esc 3 4 75.00
aes_fi 3.000s 185.838us 0 1 0.00
aes_control_fi 1.000s 83.313us 1 1 100.00
aes_cipher_fi 2.000s 56.332us 1 1 100.00
aes_ctr_fi 2.000s 48.704us 1 1 100.00
sec_cm_cipher_fsm_local_esc 3 4 75.00
aes_fi 3.000s 185.838us 0 1 0.00
aes_control_fi 1.000s 83.313us 1 1 100.00
aes_cipher_fi 2.000s 56.332us 1 1 100.00
aes_ctr_fi 2.000s 48.704us 1 1 100.00
sec_cm_ctr_fsm_local_esc 2 3 66.67
aes_fi 3.000s 185.838us 0 1 0.00
aes_control_fi 1.000s 83.313us 1 1 100.00
aes_ctr_fi 2.000s 48.704us 1 1 100.00
sec_cm_ghash_fsm_local_esc 0 1 0.00
aes_fi 3.000s 185.838us 0 1 0.00
sec_cm_data_reg_local_esc 2 3 66.67
aes_fi 3.000s 185.838us 0 1 0.00
aes_control_fi 1.000s 83.313us 1 1 100.00
aes_cipher_fi 2.000s 56.332us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 20.000s 4631.829us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 2 test runs
aes_reseed 41219722313004159836400198001411255374986282332322678114767939513695631388742 2354
UVM_INFO @ 19606100 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 61975543209131484398459434953754195702841494817323814184714900882160145849756 599
UVM_INFO @ 4631829445 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard] 1 test run
aes_fi 68346242207651096457906596183056895416106259897850563762682966481447787363812 10784
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0