Simulation Results

Simulation Results: kmac/unmasked

23/07/2026 19:40:32 DVSim: v1.50.0 sha: 40dffb6 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
79.25 %

code
65.62 %

assert
96.35 %

func
75.77 %

line
92.87 %

branch
87.28 %

cond
84.11 %

toggle
27.34 %

FSM
36.50 %

Validation stages

V1		100.00%
V2		68.97%
V2S		75.00%
V3		0.00%

8/8 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	kmac_smoke	49.510s	65086.119us	1	1	100.00
csr_hw_reset				1	1	100.00
	kmac_csr_hw_reset	1.120s	201.991us	1	1	100.00
csr_rw				1	1	100.00
	kmac_csr_rw	0.930s	53.068us	1	1	100.00
csr_bit_bash				1	1	100.00
	kmac_csr_bit_bash	6.910s	887.832us	1	1	100.00
csr_aliasing				1	1	100.00
	kmac_csr_aliasing	7.450s	542.585us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	kmac_csr_mem_rw_with_rand_reset	1.870s	573.002us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	kmac_csr_rw	0.930s	53.068us	1	1	100.00
	kmac_csr_aliasing	7.450s	542.585us	1	1	100.00
mem_walk				1	1	100.00
	kmac_mem_walk	0.780s	39.328us	1	1	100.00
mem_partial_access				1	1	100.00
	kmac_mem_partial_access	1.400s	33.819us	1	1	100.00

20/29 passed

68.97 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
long_msg_and_output				1	1	100.00
	kmac_long_msg_and_output	215.340s	17945.976us	1	1	100.00
burst_write				1	1	100.00
	kmac_burst_write	600.270s	114180.602us	1	1	100.00
test_vectors				8	8	100.00
	kmac_test_vectors_sha3_224	34.740s	12627.580us	1	1	100.00
	kmac_test_vectors_sha3_256	32.360s	5838.863us	1	1	100.00
	kmac_test_vectors_sha3_384	1316.710s	165664.252us	1	1	100.00
	kmac_test_vectors_sha3_512	951.630s	59043.746us	1	1	100.00
	kmac_test_vectors_shake_128	182.060s	15248.606us	1	1	100.00
	kmac_test_vectors_shake_256	104.710s	30998.761us	1	1	100.00
	kmac_test_vectors_kmac	3.850s	291.146us	1	1	100.00
	kmac_test_vectors_kmac_xof	2.630s	141.883us	1	1	100.00
sideload				1	1	100.00
	kmac_sideload	244.970s	24602.252us	1	1	100.00
app				0	1	0.00
	kmac_app	3.600s	211.888us	0	1	0.00
app_with_partial_data				0	1	0.00
	kmac_app_with_partial_data	3.710s	464.383us	0	1	0.00
entropy_refresh				0	1	0.00
	kmac_entropy_refresh	1.430s	292.337us	0	1	0.00
error				0	1	0.00
	kmac_error	23.000s	1594.918us	0	1	0.00
key_error				0	1	0.00
	kmac_key_error	1.160s	12.817us	0	1	0.00
sideload_invalid				0	1	0.00
	kmac_sideload_invalid	0.840s	6.099us	0	1	0.00
edn_timeout_error				1	1	100.00
	kmac_edn_timeout_error	12.080s	11459.206us	1	1	100.00
entropy_mode_error				1	1	100.00
	kmac_entropy_mode_error	14.930s	1424.485us	1	1	100.00
entropy_ready_error				0	1	0.00
	kmac_entropy_ready_error	0.850s	96.413us	0	1	0.00
lc_escalation				0	1	0.00
	kmac_lc_escalation	1.830s	36.521us	0	1	0.00
stress_all				0	1	0.00
	kmac_stress_all	4.880s	464.148us	0	1	0.00
intr_test				1	1	100.00
	kmac_intr_test	0.750s	42.134us	1	1	100.00
alert_test				1	1	100.00
	kmac_alert_test	0.890s	14.241us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	kmac_tl_errors	1.350s	47.033us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	kmac_tl_errors	1.350s	47.033us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	kmac_csr_hw_reset	1.120s	201.991us	1	1	100.00
	kmac_csr_rw	0.930s	53.068us	1	1	100.00
	kmac_csr_aliasing	7.450s	542.585us	1	1	100.00
	kmac_same_csr_outstanding	1.590s	127.399us	1	1	100.00
tl_d_partial_access				4	4	100.00
	kmac_csr_hw_reset	1.120s	201.991us	1	1	100.00
	kmac_csr_rw	0.930s	53.068us	1	1	100.00
	kmac_csr_aliasing	7.450s	542.585us	1	1	100.00
	kmac_same_csr_outstanding	1.590s	127.399us	1	1	100.00

V2S

6/8 passed

75.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
shadow_reg_update_error				1	1	100.00
	kmac_shadow_reg_errors	1.350s	49.464us	1	1	100.00
shadow_reg_read_clear_staged_value				1	1	100.00
	kmac_shadow_reg_errors	1.350s	49.464us	1	1	100.00
shadow_reg_storage_error				1	1	100.00
	kmac_shadow_reg_errors	1.350s	49.464us	1	1	100.00
shadowed_reset_glitch				1	1	100.00
	kmac_shadow_reg_errors	1.350s	49.464us	1	1	100.00
shadow_reg_update_error_with_csr_rw				1	1	100.00
	kmac_shadow_reg_errors_with_csr_rw	2.500s	180.779us	1	1	100.00
tl_intg_err				2	2	100.00
	kmac_sec_cm	29.470s	7189.835us	1	1	100.00
	kmac_tl_intg_err	3.630s	99.263us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	kmac_tl_intg_err	3.630s	99.263us	1	1	100.00
sec_cm_lc_escalate_en_intersig_mubi				0	1	0.00
	kmac_lc_escalation	1.830s	36.521us	0	1	0.00
sec_cm_sw_key_key_masking				1	1	100.00
	kmac_smoke	49.510s	65086.119us	1	1	100.00
sec_cm_key_sideload				1	1	100.00
	kmac_sideload	244.970s	24602.252us	1	1	100.00
sec_cm_cfg_shadowed_config_shadow				1	1	100.00
	kmac_shadow_reg_errors	1.350s	49.464us	1	1	100.00
sec_cm_fsm_sparse				1	1	100.00
	kmac_sec_cm	29.470s	7189.835us	1	1	100.00
sec_cm_ctr_redun				1	1	100.00
	kmac_sec_cm	29.470s	7189.835us	1	1	100.00
sec_cm_packer_ctr_redun				1	1	100.00
	kmac_sec_cm	29.470s	7189.835us	1	1	100.00
sec_cm_cfg_shadowed_config_regwen				1	1	100.00
	kmac_smoke	49.510s	65086.119us	1	1	100.00
sec_cm_fsm_global_esc				0	1	0.00
	kmac_lc_escalation	1.830s	36.521us	0	1	0.00
sec_cm_fsm_local_esc				1	1	100.00
	kmac_sec_cm	29.470s	7189.835us	1	1	100.00
sec_cm_absorbed_ctrl_mubi				0	1	0.00
	kmac_mubi	9.130s	9034.743us	0	1	0.00
sec_cm_sw_cmd_ctrl_sparse				1	1	100.00
	kmac_smoke	49.510s	65086.119us	1	1	100.00

0/1 passed

0.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
stress_all_with_rand_reset				0	1	0.00
	kmac_stress_all_with_rand_reset	1.340s	40.489us	0	1	0.00

Error Messages

	Test	seed	line	log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [] vs []) Mismatch between unmasked_digest[] and dpi_digest[*]				9 test runs
	kmac_sideload_invalid	66316547743473580285368764688941621344841121763279945159038152187220541127332	76	UVM_INFO @ 6098621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_app	98344720159334063387766813270117266920677929778733641651778458841503602988784	78	UVM_INFO @ 211888088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_app_with_partial_data	70058603618103281588693435234995228651535501008619711255961469315848861926337	78	UVM_INFO @ 464383151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_entropy_refresh	14328375253211676803048460663456356915240258499367439583801707944980239365098	77	UVM_INFO @ 292337156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_error	23407227229091167840170077975835828442424157635428429044364957259405074551167	89	UVM_INFO @ 1594917591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_entropy_ready_error	52675048417203139055412882879170824466499938525743990166451241169581868573916	77	UVM_INFO @ 96412897 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_lc_escalation	113559190909104113883932915075843791845504713139799043075446455078012775438573	78	UVM_INFO @ 36521021 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_stress_all	55049694775156963029470811194280775074043628019418443916300349568881847221396	102	UVM_INFO @ 464148474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_stress_all_with_rand_reset	1115550310791313575213760318033662797654242609854243269516705117584508690583	94	UVM_INFO @ 40489413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err)				1 test run
	kmac_mubi	246712007298169507635446577681069870261520286354776415688688416713103879786	82	UVM_INFO @ 9034742552 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))'				1 test run
	kmac_key_error	10666441929387764014175969804745031711784449778805514946262039304284854371047	78	UVM_ERROR @ 12817070 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A UVM_INFO @ 12817070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---