Simulation Results: aes/gcm_masked

 
27/07/2026 19:40:31 DVSim: v1.50.0 sha: 8e97d97 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 86.88 %
  • code
  • 95.83 %
  • assert
  • 98.29 %
  • func
  • 66.51 %
  • block
  • 95.84 %
  • line
  • 97.54 %
  • branch
  • 89.68 %
  • toggle
  • 98.05 %
  • FSM
  • 98.06 %
Validation stages
V1
100.00%
V2
100.00%
V2S
94.44%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 3.000s 234.335us 1 1 100.00
smoke 1 1 100.00
aes_smoke 3.000s 92.140us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 1.000s 94.247us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 1.000s 77.357us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 5.000s 666.714us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 2.000s 144.215us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 1.000s 66.494us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 1.000s 77.357us 1 1 100.00
aes_csr_aliasing 2.000s 144.215us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 3.000s 92.140us 1 1 100.00
aes_config_error 3.000s 256.363us 1 1 100.00
aes_stress 3.000s 651.588us 1 1 100.00
key_length 3 3 100.00
aes_smoke 3.000s 92.140us 1 1 100.00
aes_config_error 3.000s 256.363us 1 1 100.00
aes_stress 3.000s 651.588us 1 1 100.00
back2back 2 2 100.00
aes_stress 3.000s 651.588us 1 1 100.00
aes_b2b 8.000s 332.290us 1 1 100.00
backpressure 1 1 100.00
aes_stress 3.000s 651.588us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 3.000s 92.140us 1 1 100.00
aes_config_error 3.000s 256.363us 1 1 100.00
aes_stress 3.000s 651.588us 1 1 100.00
aes_alert_reset 4.000s 96.244us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 93.395us 1 1 100.00
aes_config_error 3.000s 256.363us 1 1 100.00
aes_alert_reset 4.000s 96.244us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 3.000s 290.755us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 7.000s 737.029us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 6.000s 1579.511us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 4.000s 96.244us 1 1 100.00
stress 1 1 100.00
aes_stress 3.000s 651.588us 1 1 100.00
sideload 2 2 100.00
aes_stress 3.000s 651.588us 1 1 100.00
aes_sideload 3.000s 92.669us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 2.000s 115.338us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 16.000s 1956.118us 1 1 100.00
gcm_save_and_restore 1 1 100.00
aes_gcm_save_restore 3.000s 117.528us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 2.000s 60.251us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 2.000s 116.908us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 2.000s 116.908us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 1.000s 94.247us 1 1 100.00
aes_csr_rw 1.000s 77.357us 1 1 100.00
aes_csr_aliasing 2.000s 144.215us 1 1 100.00
aes_same_csr_outstanding 2.000s 101.593us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 1.000s 94.247us 1 1 100.00
aes_csr_rw 1.000s 77.357us 1 1 100.00
aes_csr_aliasing 2.000s 144.215us 1 1 100.00
aes_same_csr_outstanding 2.000s 101.593us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 4.000s 293.562us 1 1 100.00
fault_inject 2 3 66.67
aes_fi 4.000s 166.975us 0 1 0.00
aes_control_fi 3.000s 50.892us 1 1 100.00
aes_cipher_fi 2.000s 47.167us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 281.152us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 281.152us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 281.152us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 281.152us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 567.649us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 4.000s 426.962us 1 1 100.00
aes_tl_intg_err 1.000s 137.139us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 1.000s 137.139us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 4.000s 96.244us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 281.152us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 281.152us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 3.000s 92.140us 1 1 100.00
aes_stress 3.000s 651.588us 1 1 100.00
aes_alert_reset 4.000s 96.244us 1 1 100.00
aes_core_fi 4.000s 225.289us 1 1 100.00
sec_cm_gcm_config_sparse 4 4 100.00
aes_gcm_save_restore 3.000s 117.528us 1 1 100.00
aes_config_error 3.000s 256.363us 1 1 100.00
aes_stress 3.000s 651.588us 1 1 100.00
aes_core_fi 4.000s 225.289us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 281.152us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 1.000s 61.318us 1 1 100.00
aes_stress 3.000s 651.588us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 3.000s 651.588us 1 1 100.00
aes_sideload 3.000s 92.669us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 1.000s 61.318us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 1.000s 61.318us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 1.000s 61.318us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 1.000s 61.318us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 1.000s 61.318us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 3.000s 651.588us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 3.000s 651.588us 1 1 100.00
sec_cm_main_fsm_sparse 0 1 0.00
aes_fi 4.000s 166.975us 0 1 0.00
sec_cm_main_fsm_redun 3 4 75.00
aes_fi 4.000s 166.975us 0 1 0.00
aes_control_fi 3.000s 50.892us 1 1 100.00
aes_cipher_fi 2.000s 47.167us 1 1 100.00
aes_ctr_fi 2.000s 83.451us 1 1 100.00
sec_cm_cipher_fsm_sparse 0 1 0.00
aes_fi 4.000s 166.975us 0 1 0.00
sec_cm_cipher_fsm_redun 2 3 66.67
aes_fi 4.000s 166.975us 0 1 0.00
aes_control_fi 3.000s 50.892us 1 1 100.00
aes_cipher_fi 2.000s 47.167us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 47.167us 1 1 100.00
sec_cm_ctr_fsm_sparse 0 1 0.00
aes_fi 4.000s 166.975us 0 1 0.00
sec_cm_ctr_fsm_redun 2 3 66.67
aes_fi 4.000s 166.975us 0 1 0.00
aes_control_fi 3.000s 50.892us 1 1 100.00
aes_ctr_fi 2.000s 83.451us 1 1 100.00
sec_cm_ghash_fsm_sparse 0 1 0.00
aes_fi 4.000s 166.975us 0 1 0.00
sec_cm_ctrl_sparse 3 4 75.00
aes_fi 4.000s 166.975us 0 1 0.00
aes_control_fi 3.000s 50.892us 1 1 100.00
aes_cipher_fi 2.000s 47.167us 1 1 100.00
aes_ctr_fi 2.000s 83.451us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 4.000s 96.244us 1 1 100.00
sec_cm_main_fsm_local_esc 3 4 75.00
aes_fi 4.000s 166.975us 0 1 0.00
aes_control_fi 3.000s 50.892us 1 1 100.00
aes_cipher_fi 2.000s 47.167us 1 1 100.00
aes_ctr_fi 2.000s 83.451us 1 1 100.00
sec_cm_cipher_fsm_local_esc 3 4 75.00
aes_fi 4.000s 166.975us 0 1 0.00
aes_control_fi 3.000s 50.892us 1 1 100.00
aes_cipher_fi 2.000s 47.167us 1 1 100.00
aes_ctr_fi 2.000s 83.451us 1 1 100.00
sec_cm_ctr_fsm_local_esc 2 3 66.67
aes_fi 4.000s 166.975us 0 1 0.00
aes_control_fi 3.000s 50.892us 1 1 100.00
aes_ctr_fi 2.000s 83.451us 1 1 100.00
sec_cm_ghash_fsm_local_esc 1 2 50.00
aes_ghash_fi 2.000s 60.127us 1 1 100.00
aes_fi 4.000s 166.975us 0 1 0.00
sec_cm_data_reg_local_esc 2 3 66.67
aes_fi 4.000s 166.975us 0 1 0.00
aes_control_fi 3.000s 50.892us 1 1 100.00
aes_cipher_fi 2.000s 47.167us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 12.000s 2204.060us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard] 1 test run
aes_fi 20765838644662396908144402676901096939247609661204119187135940468325505196958 6517
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done) 1 test run
aes_stress_all_with_rand_reset 9193953285340455575520844839262410884051823704580945715756480955757495659697 321
UVM_INFO @ 2204060374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---