Simulation Results: kmac/unmasked

 
29/07/2026 19:40:36 DVSim: v1.50.0 sha: 89a1064 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 78.00 %
  • code
  • 63.49 %
  • assert
  • 94.31 %
  • func
  • 76.21 %
  • line
  • 95.52 %
  • branch
  • 88.43 %
  • cond
  • 81.47 %
  • toggle
  • 21.37 %
  • FSM
  • 30.66 %
Validation stages
V1
100.00%
V2
72.41%
V2S
62.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 41.930s 25337.007us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.180s 34.030us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.210s 54.255us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 9.010s 12983.016us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 4.150s 1073.285us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.830s 72.263us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.210s 54.255us 1 1 100.00
kmac_csr_aliasing 4.150s 1073.285us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.790s 12.022us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.200s 161.119us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1146.920s 20164.300us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 360.460s 16696.977us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1349.250s 26978.692us 1 1 100.00
kmac_test_vectors_sha3_256 29.790s 2944.249us 1 1 100.00
kmac_test_vectors_sha3_384 17.720s 2312.127us 1 1 100.00
kmac_test_vectors_sha3_512 660.180s 14073.168us 1 1 100.00
kmac_test_vectors_shake_128 166.080s 16801.261us 1 1 100.00
kmac_test_vectors_shake_256 230.740s 30834.365us 1 1 100.00
kmac_test_vectors_kmac 2.000s 89.318us 1 1 100.00
kmac_test_vectors_kmac_xof 1.620s 64.309us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 98.200s 7457.969us 1 1 100.00
app 0 1 0.00
kmac_app 4.140s 88.747us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 3.340s 312.666us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 4.500s 1038.255us 0 1 0.00
error 1 1 100.00
kmac_error 45.180s 3419.947us 1 1 100.00
key_error 0 1 0.00
kmac_key_error 0.730s 66.135us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 20.610s 10039.054us 0 1 0.00
edn_timeout_error 0 1 0.00
kmac_edn_timeout_error 6.960s 928.037us 0 1 0.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 11.860s 2595.483us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.920s 18.157us 0 1 0.00
lc_escalation 0 1 0.00
kmac_lc_escalation 1.320s 36.998us 0 1 0.00
stress_all 1 1 100.00
kmac_stress_all 111.910s 2457.334us 1 1 100.00
intr_test 1 1 100.00
kmac_intr_test 0.830s 44.422us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.880s 40.160us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 1.560s 25.025us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 1.560s 25.025us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.180s 34.030us 1 1 100.00
kmac_csr_rw 1.210s 54.255us 1 1 100.00
kmac_csr_aliasing 4.150s 1073.285us 1 1 100.00
kmac_same_csr_outstanding 1.480s 221.489us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.180s 34.030us 1 1 100.00
kmac_csr_rw 1.210s 54.255us 1 1 100.00
kmac_csr_aliasing 4.150s 1073.285us 1 1 100.00
kmac_same_csr_outstanding 1.480s 221.489us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.400s 111.416us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.400s 111.416us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.400s 111.416us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.400s 111.416us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.450s 122.691us 1 1 100.00
tl_intg_err 1 2 50.00
kmac_sec_cm 1.060s 52.103us 0 1 0.00
kmac_tl_intg_err 3.070s 623.656us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 3.070s 623.656us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 0 1 0.00
kmac_lc_escalation 1.320s 36.998us 0 1 0.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 41.930s 25337.007us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 98.200s 7457.969us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.400s 111.416us 1 1 100.00
sec_cm_fsm_sparse 0 1 0.00
kmac_sec_cm 1.060s 52.103us 0 1 0.00
sec_cm_ctr_redun 0 1 0.00
kmac_sec_cm 1.060s 52.103us 0 1 0.00
sec_cm_packer_ctr_redun 0 1 0.00
kmac_sec_cm 1.060s 52.103us 0 1 0.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 41.930s 25337.007us 1 1 100.00
sec_cm_fsm_global_esc 0 1 0.00
kmac_lc_escalation 1.320s 36.998us 0 1 0.00
sec_cm_fsm_local_esc 0 1 0.00
kmac_sec_cm 1.060s 52.103us 0 1 0.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 2.320s 1942.450us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 41.930s 25337.007us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 29.980s 2878.655us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (kmac_scoreboard.sv:524) scoreboard [scoreboard] Saw request be handled for app * when that app was not selected. 4 test runs
kmac_app_with_partial_data 99586653232077708871209018492177246498554418679894478702298083314875558928811 78
UVM_INFO @ 312665653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 7937487864223864969428150615541164919762755861587846026167621968494883935587 78
UVM_INFO @ 1038254797 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_key_error 76193561562361861705469159000606813849353388595298532225554925967953133915200 77
UVM_INFO @ 66134570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 52342499426794655648838940250697279288305153145995568436168030356817013287832 148
UVM_INFO @ 2878654579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:1673) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 2 test runs
kmac_app 90184955230249370915852381573733447695700167731085130449733247537148263623839 80
UVM_INFO @ 88746573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 19103300229238554495183816926128007448479824801683132724926548772228769899505 77
UVM_INFO @ 18156619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [sequencer] Item_done() called with no outstanding requests. Each call to item_done() must be paired with a previous call to get_next_item(). 2 test runs
kmac_lc_escalation 21748569515531077926489666618585293772235964647313920843452182864576617628657 77
UVM_INFO @ 36998404 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_sec_cm 62778298601201410349963206168413070935843116643125299627401749501919561203609 79
UVM_INFO @ 52102601 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) 1 test run
kmac_sideload_invalid 28211753495413003688015425504421417116471694104421364918535343488462753396724 78
UVM_INFO @ 10039053977 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (kmac_scoreboard.sv:601) scoreboard [scoreboard] Unexpected m_error value in the app response (*) 1 test run
kmac_mubi 18475769458713830645836561195178330124068648238693401282147139723357120417300 78
UVM_INFO @ 1942449779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_edn_timeout_error 74878610761797732016831313425858542853535524031796533280616074518311088381437 84
UVM_ERROR @ 928037392 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 928037392 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---