Simulation Results: aes/gcm_masked

 
30/07/2026 19:40:39 DVSim: v1.50.0 sha: 2695753 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 85.83 %
  • code
  • 95.59 %
  • assert
  • 98.29 %
  • func
  • 63.61 %
  • block
  • 95.73 %
  • line
  • 97.40 %
  • branch
  • 89.50 %
  • toggle
  • 98.05 %
  • FSM
  • 97.42 %
Validation stages
V1
100.00%
V2
94.74%
V2S
88.89%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 132.147us 1 1 100.00
smoke 1 1 100.00
aes_smoke 3.000s 118.347us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 52.361us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 1.000s 85.794us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 3.000s 257.265us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 2.000s 171.810us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 1.000s 109.322us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 1.000s 85.794us 1 1 100.00
aes_csr_aliasing 2.000s 171.810us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 3.000s 118.347us 1 1 100.00
aes_config_error 4.000s 143.766us 1 1 100.00
aes_stress 3.000s 190.806us 1 1 100.00
key_length 3 3 100.00
aes_smoke 3.000s 118.347us 1 1 100.00
aes_config_error 4.000s 143.766us 1 1 100.00
aes_stress 3.000s 190.806us 1 1 100.00
back2back 2 2 100.00
aes_stress 3.000s 190.806us 1 1 100.00
aes_b2b 3.000s 277.746us 1 1 100.00
backpressure 1 1 100.00
aes_stress 3.000s 190.806us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 3.000s 118.347us 1 1 100.00
aes_config_error 4.000s 143.766us 1 1 100.00
aes_stress 3.000s 190.806us 1 1 100.00
aes_alert_reset 3.000s 134.192us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 137.048us 1 1 100.00
aes_config_error 4.000s 143.766us 1 1 100.00
aes_alert_reset 3.000s 134.192us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 2.000s 128.877us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 9.000s 273.620us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 7.000s 1254.896us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 3.000s 134.192us 1 1 100.00
stress 1 1 100.00
aes_stress 3.000s 190.806us 1 1 100.00
sideload 2 2 100.00
aes_stress 3.000s 190.806us 1 1 100.00
aes_sideload 3.000s 288.848us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 3.000s 203.136us 1 1 100.00
stress_all 0 1 0.00
aes_stress_all 13.000s 2504.236us 0 1 0.00
gcm_save_and_restore 1 1 100.00
aes_gcm_save_restore 3.000s 74.634us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 1.000s 76.254us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 2.000s 433.123us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 2.000s 433.123us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 52.361us 1 1 100.00
aes_csr_rw 1.000s 85.794us 1 1 100.00
aes_csr_aliasing 2.000s 171.810us 1 1 100.00
aes_same_csr_outstanding 2.000s 107.511us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 52.361us 1 1 100.00
aes_csr_rw 1.000s 85.794us 1 1 100.00
aes_csr_aliasing 2.000s 171.810us 1 1 100.00
aes_same_csr_outstanding 2.000s 107.511us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 3.000s 105.057us 1 1 100.00
fault_inject 1 3 33.33
aes_fi 3602.068s 0.000us 0 1 0.00
aes_control_fi 50.000s 10004.734us 0 1 0.00
aes_cipher_fi 3.000s 158.233us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 1.000s 103.588us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 1.000s 103.588us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 1.000s 103.588us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 1.000s 103.588us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 356.612us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 5.000s 2033.862us 1 1 100.00
aes_tl_intg_err 2.000s 279.553us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 279.553us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 3.000s 134.192us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 1.000s 103.588us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 1.000s 103.588us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 3.000s 118.347us 1 1 100.00
aes_stress 3.000s 190.806us 1 1 100.00
aes_alert_reset 3.000s 134.192us 1 1 100.00
aes_core_fi 3.000s 69.912us 1 1 100.00
sec_cm_gcm_config_sparse 4 4 100.00
aes_gcm_save_restore 3.000s 74.634us 1 1 100.00
aes_config_error 4.000s 143.766us 1 1 100.00
aes_stress 3.000s 190.806us 1 1 100.00
aes_core_fi 3.000s 69.912us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 1.000s 103.588us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 156.810us 1 1 100.00
aes_stress 3.000s 190.806us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 3.000s 190.806us 1 1 100.00
aes_sideload 3.000s 288.848us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 156.810us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 156.810us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 156.810us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 156.810us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 156.810us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 3.000s 190.806us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 3.000s 190.806us 1 1 100.00
sec_cm_main_fsm_sparse 0 1 0.00
aes_fi 3602.068s 0.000us 0 1 0.00
sec_cm_main_fsm_redun 2 4 50.00
aes_fi 3602.068s 0.000us 0 1 0.00
aes_control_fi 50.000s 10004.734us 0 1 0.00
aes_cipher_fi 3.000s 158.233us 1 1 100.00
aes_ctr_fi 2.000s 55.624us 1 1 100.00
sec_cm_cipher_fsm_sparse 0 1 0.00
aes_fi 3602.068s 0.000us 0 1 0.00
sec_cm_cipher_fsm_redun 1 3 33.33
aes_fi 3602.068s 0.000us 0 1 0.00
aes_control_fi 50.000s 10004.734us 0 1 0.00
aes_cipher_fi 3.000s 158.233us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 3.000s 158.233us 1 1 100.00
sec_cm_ctr_fsm_sparse 0 1 0.00
aes_fi 3602.068s 0.000us 0 1 0.00
sec_cm_ctr_fsm_redun 1 3 33.33
aes_fi 3602.068s 0.000us 0 1 0.00
aes_control_fi 50.000s 10004.734us 0 1 0.00
aes_ctr_fi 2.000s 55.624us 1 1 100.00
sec_cm_ghash_fsm_sparse 0 1 0.00
aes_fi 3602.068s 0.000us 0 1 0.00
sec_cm_ctrl_sparse 2 4 50.00
aes_fi 3602.068s 0.000us 0 1 0.00
aes_control_fi 50.000s 10004.734us 0 1 0.00
aes_cipher_fi 3.000s 158.233us 1 1 100.00
aes_ctr_fi 2.000s 55.624us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 3.000s 134.192us 1 1 100.00
sec_cm_main_fsm_local_esc 2 4 50.00
aes_fi 3602.068s 0.000us 0 1 0.00
aes_control_fi 50.000s 10004.734us 0 1 0.00
aes_cipher_fi 3.000s 158.233us 1 1 100.00
aes_ctr_fi 2.000s 55.624us 1 1 100.00
sec_cm_cipher_fsm_local_esc 2 4 50.00
aes_fi 3602.068s 0.000us 0 1 0.00
aes_control_fi 50.000s 10004.734us 0 1 0.00
aes_cipher_fi 3.000s 158.233us 1 1 100.00
aes_ctr_fi 2.000s 55.624us 1 1 100.00
sec_cm_ctr_fsm_local_esc 1 3 33.33
aes_fi 3602.068s 0.000us 0 1 0.00
aes_control_fi 50.000s 10004.734us 0 1 0.00
aes_ctr_fi 2.000s 55.624us 1 1 100.00
sec_cm_ghash_fsm_local_esc 1 2 50.00
aes_ghash_fi 2.000s 233.140us 1 1 100.00
aes_fi 3602.068s 0.000us 0 1 0.00
sec_cm_data_reg_local_esc 1 3 33.33
aes_fi 3602.068s 0.000us 0 1 0.00
aes_control_fi 50.000s 10004.734us 0 1 0.00
aes_cipher_fi 3.000s 158.233us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 1.000s 25.220us 0 1 0.00

Error Messages

   Test seed line log context
Job timed out after * minutes 1 test run
aes_fi 16126445397286798034051847096165796688096023844088841581302633021210898920066 None
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! 1 test run
aes_control_fi 97087139537488253513263203535981064208994242499848029275752720400383825704387 152
UVM_INFO @ 10004734316 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 1 test run
aes_stress_all 93477033756270644092299733628148752023458365939786498864430897310473851908856 78104
UVM_INFO @ 2504236002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done) 1 test run
aes_stress_all_with_rand_reset 58488797831644214744214929323938400781621784725424192518550134820998526000430 150
UVM_INFO @ 25219799 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---