Simulation Results: entropy_src/rng_16bits

 
30/07/2026 19:40:39 DVSim: v1.50.0 sha: 2695753 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 70.89 %
  • code
  • 83.16 %
  • assert
  • 74.34 %
  • func
  • 55.17 %
  • block
  • 94.16 %
  • line
  • 97.86 %
  • branch
  • 86.18 %
  • toggle
  • 52.77 %
  • FSM
  • 95.83 %
Validation stages
V1
83.33%
V2
93.75%
V2S
85.71%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 2.000s 26.802us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 40.866us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 1.000s 52.703us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 7.000s 1797.256us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 5.000s 836.948us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 1.000s 14.603us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 1.000s 52.703us 1 1 100.00
entropy_src_csr_aliasing 5.000s 836.948us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 2 3 66.67
entropy_src_smoke 2.000s 26.802us 1 1 100.00
entropy_src_rng 20.000s 5680.868us 0 1 0.00
entropy_src_fw_ov 58.000s 14089.264us 1 1 100.00
firmware_mode 1 1 100.00
entropy_src_fw_ov 58.000s 14089.264us 1 1 100.00
rng_mode 0 1 0.00
entropy_src_rng 20.000s 5680.868us 0 1 0.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 523.000s 14021.415us 1 1 100.00
health_checks 0 1 0.00
entropy_src_rng 20.000s 5680.868us 0 1 0.00
conditioning 0 1 0.00
entropy_src_rng 20.000s 5680.868us 0 1 0.00
interrupts 1 2 50.00
entropy_src_rng 20.000s 5680.868us 0 1 0.00
entropy_src_intr 21.000s 3948.695us 1 1 100.00
alerts 1 2 50.00
entropy_src_rng 20.000s 5680.868us 0 1 0.00
entropy_src_functional_alerts 5.000s 680.832us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 5.000s 199.795us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 256.454us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 4.000s 97.701us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 2.000s 21.302us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 2.000s 23.812us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 4.000s 433.324us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 4.000s 433.324us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 40.866us 1 1 100.00
entropy_src_csr_rw 1.000s 52.703us 1 1 100.00
entropy_src_csr_aliasing 5.000s 836.948us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 90.695us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 40.866us 1 1 100.00
entropy_src_csr_rw 1.000s 52.703us 1 1 100.00
entropy_src_csr_aliasing 5.000s 836.948us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 90.695us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 2.000s 59.304us 1 1 100.00
entropy_src_tl_intg_err 4.000s 354.795us 1 1 100.00
sec_cm_config_regwen 1 2 50.00
entropy_src_rng 20.000s 5680.868us 0 1 0.00
entropy_src_cfg_regwen 2.000s 49.231us 1 1 100.00
sec_cm_config_mubi 0 1 0.00
entropy_src_rng 20.000s 5680.868us 0 1 0.00
sec_cm_config_redun 0 1 0.00
entropy_src_rng 20.000s 5680.868us 0 1 0.00
sec_cm_intersig_mubi 1 2 50.00
entropy_src_rng 20.000s 5680.868us 0 1 0.00
entropy_src_fw_ov 58.000s 14089.264us 1 1 100.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 256.454us 1 1 100.00
entropy_src_sec_cm 2.000s 59.304us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 256.454us 1 1 100.00
entropy_src_sec_cm 2.000s 59.304us 1 1 100.00
sec_cm_rng_bkgn_chk 0 1 0.00
entropy_src_rng 20.000s 5680.868us 0 1 0.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 256.454us 1 1 100.00
entropy_src_sec_cm 2.000s 59.304us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 256.454us 1 1 100.00
entropy_src_sec_cm 2.000s 59.304us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 256.454us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 5.000s 680.832us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 4.000s 354.795us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 319.000s 13106.471us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
entropy_src_stress_all_with_rand_reset 2.000s 9.191us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (entropy_src_rng_vseq.sv:637) [entropy_src_rng_vseq] Interrupt handler timed out 1 test run
entropy_src_rng 97930373274698795592720156090058901717562250024010067215183296828025894044489 538
UVM_INFO @ 5680867914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror adaptp_lo_total_fails 1 test run
entropy_src_stress_all_with_rand_reset 69811719045685116299451374135522179459826563027229765557493520353739911413961 112
UVM_INFO @ 9191445 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror adaptp_hi_total_fails 1 test run
entropy_src_csr_mem_rw_with_rand_reset 90513299775990121357311114596292721062230604911989706453461906584522796432099 113
UVM_INFO @ 14603014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---