Simulation Results: gpio

 
30/07/2026 19:40:39 DVSim: v1.50.0 sha: 2695753 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 90.20 %
  • code
  • 71.86 %
  • assert
  • 98.73 %
  • func
  • 100.00 %
  • line
  • 92.70 %
  • branch
  • 88.93 %
  • cond
  • 89.42 %
  • toggle
  • 78.89 %
  • FSM
  • 9.38 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.120s 82.300us 1 1 100.00
gpio_smoke_no_pullup_pulldown 0.810s 240.627us 1 1 100.00
gpio_smoke_en_cdc_prim 0.980s 134.905us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.010s 151.939us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.890s 18.304us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.750s 24.142us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.600s 409.309us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 2.700s 173.756us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 1.010s 21.359us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.750s 24.142us 1 1 100.00
gpio_csr_aliasing 2.700s 173.756us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 0.720s 34.750us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.060s 191.039us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.590s 18.659us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 0.660s 84.995us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 1.910s 534.750us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 1.590s 60.258us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 10.830s 2717.758us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 3.340s 138.817us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 0.640s 264.197us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 25.700s 1690.484us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.630s 22.961us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.590s 53.451us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 1.400s 241.287us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 1.400s 241.287us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.750s 24.142us 1 1 100.00
gpio_same_csr_outstanding 0.790s 115.844us 1 1 100.00
gpio_csr_aliasing 2.700s 173.756us 1 1 100.00
gpio_csr_hw_reset 0.890s 18.304us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.750s 24.142us 1 1 100.00
gpio_same_csr_outstanding 0.790s 115.844us 1 1 100.00
gpio_csr_aliasing 2.700s 173.756us 1 1 100.00
gpio_csr_hw_reset 0.890s 18.304us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 2.330s 415.719us 1 1 100.00
gpio_sec_cm 0.800s 432.077us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 2.330s 415.719us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.640s 38.330us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 0.750s 38.362us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
gpio_inp_prd_cnt 0.610s 13.660us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:248) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 19481803808671000888831994352428919845729032506309943221267103976585733464530 1365
UVM_INFO @ 1690484198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 23797019520524024946673685383843813459219487755582468139694622212826970815578 87
UVM_INFO @ 38362410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---