Simulation Results: entropy_src/rng_16bits

 
03/08/2026 19:51:35 DVSim: v1.50.0 sha: 2719cd7 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 71.41 %
  • code
  • 82.57 %
  • assert
  • 73.92 %
  • func
  • 57.74 %
  • block
  • 94.16 %
  • line
  • 97.84 %
  • branch
  • 86.18 %
  • toggle
  • 52.51 %
  • FSM
  • 93.75 %
Validation stages
V1
83.33%
V2
100.00%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 2.000s 43.824us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 1.000s 22.950us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 1.000s 34.908us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 4.000s 120.115us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 3.000s 68.489us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 2.000s 22.967us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 1.000s 34.908us 1 1 100.00
entropy_src_csr_aliasing 3.000s 68.489us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 3 3 100.00
entropy_src_smoke 2.000s 43.824us 1 1 100.00
entropy_src_rng 273.000s 13018.809us 1 1 100.00
entropy_src_fw_ov 329.000s 14074.703us 1 1 100.00
firmware_mode 1 1 100.00
entropy_src_fw_ov 329.000s 14074.703us 1 1 100.00
rng_mode 1 1 100.00
entropy_src_rng 273.000s 13018.809us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 122.000s 14156.674us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 273.000s 13018.809us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 273.000s 13018.809us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 273.000s 13018.809us 1 1 100.00
entropy_src_intr 11.000s 358.999us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 273.000s 13018.809us 1 1 100.00
entropy_src_functional_alerts 6.000s 746.905us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 88.000s 14948.853us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 52.407us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 5.000s 571.319us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 1.000s 37.599us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 2.000s 207.346us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 3.000s 77.746us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 3.000s 77.746us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 1.000s 22.950us 1 1 100.00
entropy_src_csr_rw 1.000s 34.908us 1 1 100.00
entropy_src_csr_aliasing 3.000s 68.489us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 413.336us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 1.000s 22.950us 1 1 100.00
entropy_src_csr_rw 1.000s 34.908us 1 1 100.00
entropy_src_csr_aliasing 3.000s 68.489us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 413.336us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 3.000s 137.175us 1 1 100.00
entropy_src_tl_intg_err 3.000s 212.016us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 273.000s 13018.809us 1 1 100.00
entropy_src_cfg_regwen 2.000s 41.643us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 273.000s 13018.809us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 273.000s 13018.809us 1 1 100.00
sec_cm_intersig_mubi 2 2 100.00
entropy_src_rng 273.000s 13018.809us 1 1 100.00
entropy_src_fw_ov 329.000s 14074.703us 1 1 100.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 52.407us 1 1 100.00
entropy_src_sec_cm 3.000s 137.175us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 52.407us 1 1 100.00
entropy_src_sec_cm 3.000s 137.175us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 273.000s 13018.809us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 52.407us 1 1 100.00
entropy_src_sec_cm 3.000s 137.175us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 52.407us 1 1 100.00
entropy_src_sec_cm 3.000s 137.175us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 52.407us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 6.000s 746.905us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 3.000s 212.016us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 91.000s 14210.456us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
entropy_src_stress_all_with_rand_reset 2.000s 8.198us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror adaptp_hi_total_fails 1 test run
entropy_src_stress_all_with_rand_reset 108115583219385008834347974839649113344404284680078047700965736789777391917218 112
UVM_INFO @ 8198428 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror repcnts_total_fails 1 test run
entropy_src_csr_mem_rw_with_rand_reset 98445009671646852962708671616985841962097004184476839567673720386505136504246 113
UVM_INFO @ 22967230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---