Simulation Results: ac_range_check

 
05/08/2026 19:49:27 DVSim: v1.50.0 sha: 023bd59 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 82.85 %
  • code
  • 93.00 %
  • assert
  • 97.75 %
  • func
  • 57.79 %
  • block
  • 99.10 %
  • line
  • 99.93 %
  • branch
  • 98.24 %
  • toggle
  • 80.82 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 27.000s 9702.420us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 32.000s 1556.981us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 2.000s 43.038us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 2.000s 51.324us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 35.000s 6097.661us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 18.000s 1264.262us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 1.000s 135.543us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 2.000s 51.324us 1 1 100.00
ac_range_check_csr_aliasing 18.000s 1264.262us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 3.000s 125.169us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 29.000s 3414.420us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 148.000s 8534.543us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 1.000s 32.757us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 2.000s 14.016us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 2.000s 78.540us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 2.000s 78.540us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 2.000s 43.038us 1 1 100.00
ac_range_check_csr_rw 2.000s 51.324us 1 1 100.00
ac_range_check_csr_aliasing 18.000s 1264.262us 1 1 100.00
ac_range_check_same_csr_outstanding 3.000s 57.064us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 2.000s 43.038us 1 1 100.00
ac_range_check_csr_rw 2.000s 51.324us 1 1 100.00
ac_range_check_csr_aliasing 18.000s 1264.262us 1 1 100.00
ac_range_check_same_csr_outstanding 3.000s 57.064us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 9.000s 4426.316us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 9.000s 4426.316us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 9.000s 4426.316us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 9.000s 4426.316us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 54.000s 1382.715us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 2.000s 36.622us 1 1 100.00
ac_range_check_tl_intg_err 7.000s 1648.728us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 263.000s 1479.288us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 26.000s 1534.959us 1 1 100.00