Simulation Results: mbx

 
05/08/2026 19:49:27 DVSim: v1.50.0 sha: 023bd59 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 87.34 %
  • code
  • 91.52 %
  • assert
  • 97.34 %
  • func
  • 73.15 %
  • block
  • 96.88 %
  • line
  • 96.71 %
  • branch
  • 91.89 %
  • toggle
  • 85.96 %
Validation stages
V1
83.33%
V2
81.82%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_smoke 1 1 100.00
mbx_smoke 33.000s 3194.324us 1 1 100.00
csr_hw_reset 1 1 100.00
mbx_csr_hw_reset 1.000s 41.326us 1 1 100.00
csr_rw 1 1 100.00
mbx_csr_rw 1.000s 22.056us 1 1 100.00
csr_bit_bash 1 1 100.00
mbx_csr_bit_bash 3.000s 629.345us 1 1 100.00
csr_aliasing 1 1 100.00
mbx_csr_aliasing 2.000s 58.314us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
mbx_csr_mem_rw_with_rand_reset 2.000s 133.047us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
mbx_csr_rw 1.000s 22.056us 1 1 100.00
mbx_csr_aliasing 2.000s 58.314us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_stress 0 1 0.00
mbx_stress 4.000s 156.225us 0 1 0.00
mbx_max_activity 1 1 100.00
mbx_stress_zero_delays 41.000s 12107.688us 1 1 100.00
mbx_imbx_oob 1 1 100.00
mbx_imbx_oob 59.000s 13450.534us 1 1 100.00
mbx_doe_intr_msg 1 1 100.00
mbx_doe_intr_msg 15.000s 572.719us 1 1 100.00
alert_test 1 1 100.00
mbx_alert_test 1.000s 20.121us 1 1 100.00
intr_test 1 1 100.00
mbx_intr_test 1.000s 23.199us 1 1 100.00
tl_d_oob_addr_access 0 1 0.00
mbx_tl_errors 1.000s 6.550us 0 1 0.00
tl_d_illegal_access 0 1 0.00
mbx_tl_errors 1.000s 6.550us 0 1 0.00
tl_d_outstanding_access 4 4 100.00
mbx_csr_hw_reset 1.000s 41.326us 1 1 100.00
mbx_csr_rw 1.000s 22.056us 1 1 100.00
mbx_csr_aliasing 2.000s 58.314us 1 1 100.00
mbx_same_csr_outstanding 1.000s 23.835us 1 1 100.00
tl_d_partial_access 4 4 100.00
mbx_csr_hw_reset 1.000s 41.326us 1 1 100.00
mbx_csr_rw 1.000s 22.056us 1 1 100.00
mbx_csr_aliasing 2.000s 58.314us 1 1 100.00
mbx_same_csr_outstanding 1.000s 23.835us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
mbx_tl_intg_err 2.000s 97.636us 1 1 100.00
mbx_sec_cm 1.000s 22.321us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:622) scoreboard [scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted *, but saw *). 2 test runs
mbx_tl_errors 25824668366408053493432711636249785096017201960405508894570289807027155503993 85
TL item was: req: (cip_tl_seq_item@17861) { a_addr: 'h8e46d650 a_data: 'hea791eb4 a_mask: 'h2 a_size: 'h1 a_param: 'h0 a_source: 'h35 a_opcode: 'h1 a_user: 'h27cbb d_param: 'h0 d_source: 'h35 d_data: 'h0 d_size: 'h1 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h10aa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 6550357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
mbx_csr_mem_rw_with_rand_reset 57066203184584665993872878581207682492775930901949949589576491791615852211263 92
TL item was: req: (cip_tl_seq_item@25219) { a_addr: 'h7c9a414 a_data: 'h2fba3801 a_mask: 'h1 a_size: 'h1 a_param: 'h0 a_source: 'h72 a_opcode: 'h1 a_user: 'h2655e d_param: 'h0 d_source: 'h72 d_data: 'h0 d_size: 'h1 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h10aa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 133046687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (mbx_scoreboard.sv:500) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) RDATA read data mismatched 1 test run
mbx_stress 27270580973130557831055638558018868981873823340533315149320092857455522098243 227
UVM_INFO @ 156225190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---