| V1 |
|
100.00% |
| V2 |
|
68.97% |
| V2S |
|
62.50% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| kmac_smoke | 1.970s | 55.100us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| kmac_csr_hw_reset | 1.070s | 76.940us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| kmac_csr_rw | 0.990s | 76.829us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| kmac_csr_bit_bash | 11.650s | 687.141us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| kmac_csr_aliasing | 3.300s | 288.990us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| kmac_csr_mem_rw_with_rand_reset | 1.270s | 26.318us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| kmac_csr_rw | 0.990s | 76.829us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 3.300s | 288.990us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| kmac_mem_walk | 0.770s | 14.816us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| kmac_mem_partial_access | 1.300s | 159.867us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| long_msg_and_output | 1 | 1 | 100.00 | |||
| kmac_long_msg_and_output | 2986.550s | 115775.227us | 1 | 1 | 100.00 | |
| burst_write | 1 | 1 | 100.00 | |||
| kmac_burst_write | 319.010s | 23094.092us | 1 | 1 | 100.00 | |
| test_vectors | 8 | 8 | 100.00 | |||
| kmac_test_vectors_sha3_224 | 30.830s | 3277.014us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_256 | 21.840s | 785.003us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_384 | 22.770s | 3680.529us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_512 | 1018.150s | 298234.723us | 1 | 1 | 100.00 | |
| kmac_test_vectors_shake_128 | 106.270s | 12099.773us | 1 | 1 | 100.00 | |
| kmac_test_vectors_shake_256 | 228.590s | 7704.871us | 1 | 1 | 100.00 | |
| kmac_test_vectors_kmac | 2.200s | 689.112us | 1 | 1 | 100.00 | |
| kmac_test_vectors_kmac_xof | 2.230s | 248.517us | 1 | 1 | 100.00 | |
| sideload | 1 | 1 | 100.00 | |||
| kmac_sideload | 200.050s | 28666.925us | 1 | 1 | 100.00 | |
| app | 0 | 1 | 0.00 | |||
| kmac_app | 6.040s | 964.705us | 0 | 1 | 0.00 | |
| app_with_partial_data | 0 | 1 | 0.00 | |||
| kmac_app_with_partial_data | 4.910s | 1995.191us | 0 | 1 | 0.00 | |
| entropy_refresh | 0 | 1 | 0.00 | |||
| kmac_entropy_refresh | 0.930s | 8.830us | 0 | 1 | 0.00 | |
| error | 0 | 1 | 0.00 | |||
| kmac_error | 7.230s | 310.775us | 0 | 1 | 0.00 | |
| key_error | 0 | 1 | 0.00 | |||
| kmac_key_error | 0.860s | 5.693us | 0 | 1 | 0.00 | |
| sideload_invalid | 0 | 1 | 0.00 | |||
| kmac_sideload_invalid | 0.990s | 24.150us | 0 | 1 | 0.00 | |
| edn_timeout_error | 0 | 1 | 0.00 | |||
| kmac_edn_timeout_error | 18.270s | 3206.724us | 0 | 1 | 0.00 | |
| entropy_mode_error | 1 | 1 | 100.00 | |||
| kmac_entropy_mode_error | 20.460s | 1578.488us | 1 | 1 | 100.00 | |
| entropy_ready_error | 0 | 1 | 0.00 | |||
| kmac_entropy_ready_error | 1.120s | 10.645us | 0 | 1 | 0.00 | |
| lc_escalation | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 0.910s | 7.337us | 0 | 1 | 0.00 | |
| stress_all | 1 | 1 | 100.00 | |||
| kmac_stress_all | 96.150s | 3489.732us | 1 | 1 | 100.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| kmac_intr_test | 0.780s | 42.420us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| kmac_alert_test | 0.750s | 53.056us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 1.910s | 101.540us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 1.910s | 101.540us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 1.070s | 76.940us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 0.990s | 76.829us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 3.300s | 288.990us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 2.040s | 1670.126us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 1.070s | 76.940us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 0.990s | 76.829us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 3.300s | 288.990us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 2.040s | 1670.126us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.340s | 51.979us | 1 | 1 | 100.00 | |
| shadow_reg_read_clear_staged_value | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.340s | 51.979us | 1 | 1 | 100.00 | |
| shadow_reg_storage_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.340s | 51.979us | 1 | 1 | 100.00 | |
| shadowed_reset_glitch | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.340s | 51.979us | 1 | 1 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors_with_csr_rw | 2.300s | 491.338us | 1 | 1 | 100.00 | |
| tl_intg_err | 1 | 2 | 50.00 | |||
| kmac_sec_cm | 1.020s | 31.259us | 0 | 1 | 0.00 | |
| kmac_tl_intg_err | 2.330s | 139.496us | 1 | 1 | 100.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| kmac_tl_intg_err | 2.330s | 139.496us | 1 | 1 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 0.910s | 7.337us | 0 | 1 | 0.00 | |
| sec_cm_sw_key_key_masking | 1 | 1 | 100.00 | |||
| kmac_smoke | 1.970s | 55.100us | 1 | 1 | 100.00 | |
| sec_cm_key_sideload | 1 | 1 | 100.00 | |||
| kmac_sideload | 200.050s | 28666.925us | 1 | 1 | 100.00 | |
| sec_cm_cfg_shadowed_config_shadow | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.340s | 51.979us | 1 | 1 | 100.00 | |
| sec_cm_fsm_sparse | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.020s | 31.259us | 0 | 1 | 0.00 | |
| sec_cm_ctr_redun | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.020s | 31.259us | 0 | 1 | 0.00 | |
| sec_cm_packer_ctr_redun | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.020s | 31.259us | 0 | 1 | 0.00 | |
| sec_cm_cfg_shadowed_config_regwen | 1 | 1 | 100.00 | |||
| kmac_smoke | 1.970s | 55.100us | 1 | 1 | 100.00 | |
| sec_cm_fsm_global_esc | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 0.910s | 7.337us | 0 | 1 | 0.00 | |
| sec_cm_fsm_local_esc | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.020s | 31.259us | 0 | 1 | 0.00 | |
| sec_cm_absorbed_ctrl_mubi | 0 | 1 | 0.00 | |||
| kmac_mubi | 2.970s | 51.865us | 0 | 1 | 0.00 | |
| sec_cm_sw_cmd_ctrl_sparse | 1 | 1 | 100.00 | |||
| kmac_smoke | 1.970s | 55.100us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| kmac_stress_all_with_rand_reset | 1.070s | 86.650us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (kmac_scoreboard.sv:524) scoreboard [scoreboard] Saw request be handled for app * when that app was not selected. | 5 test runs | |||
| kmac_app | 15328633167223287599996363166937536449349361016782659753956083248202816405755 | 81 |
UVM_INFO @ 964704644 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_app_with_partial_data | 77419932483809344168674692273349114165328883854905282255757643207373445043156 | 79 |
UVM_INFO @ 1995190838 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_error | 17412678454520964360340774436212293313243324570026432862651640167322998442891 | 81 |
UVM_INFO @ 310774610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_key_error | 25732877528653870757107936581675860691726226266372652065195866523947394675136 | 77 |
UVM_INFO @ 5693141 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_lc_escalation | 108701459571707617593428833623405882302738596618889620636197564296538576771659 | 77 |
UVM_INFO @ 7337266 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (kmac_scoreboard.sv:1673) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] | 4 test runs | |||
| kmac_sideload_invalid | 2994631877555334355691898367613918670287187426163713330964630849639213321333 | 79 |
UVM_INFO @ 24149660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_entropy_refresh | 46644969066263764022051774513715002961298880327128421082718889482494310548809 | 77 |
UVM_INFO @ 8829889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_entropy_ready_error | 112794113984547795530538869732549233611608999973664015343034351176727738113627 | 77 |
UVM_INFO @ 10645001 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_stress_all_with_rand_reset | 38902113411824212670357186924789103538167999798851143235876703669421115945180 | 94 |
UVM_INFO @ 86649521 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (kmac_scoreboard.sv:601) scoreboard [scoreboard] Unexpected m_error value in the app response (*) | 1 test run | |||
| kmac_mubi | 115728946751974747022716626418718600372338850233155383995107200311196906099502 | 78 |
UVM_INFO @ 51865321 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' | 1 test run | |||
| kmac_edn_timeout_error | 100770729503492504004771016700752109557512149461898657536808894287793670666698 | 93 |
UVM_ERROR @ 3206724161 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 3206724161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL sequencer [sequencer] Item_done() called with no outstanding requests. Each call to item_done() must be paired with a previous call to get_next_item(). | 1 test run | |||
| kmac_sec_cm | 63026800314199881633486859412405441225234812988534697174804847098484358717262 | 78 |
UVM_INFO @ 31258707 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|