Simulation Results: aes/gcm_masked

 
10/08/2026 19:46:33 DVSim: v1.50.1 sha: af43bb2 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 85.99 %
  • code
  • 95.77 %
  • assert
  • 98.29 %
  • func
  • 63.91 %
  • block
  • 95.97 %
  • line
  • 97.56 %
  • branch
  • 90.04 %
  • toggle
  • 98.05 %
  • FSM
  • 97.42 %
Validation stages
V1
100.00%
V2
84.21%
V2S
83.33%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 102.536us 1 1 100.00
smoke 1 1 100.00
aes_smoke 2.000s 75.384us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 3.000s 299.289us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 1.000s 58.786us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 9.000s 2486.476us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 3.000s 233.194us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 1.000s 57.317us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 1.000s 58.786us 1 1 100.00
aes_csr_aliasing 3.000s 233.194us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 2.000s 75.384us 1 1 100.00
aes_config_error 10.000s 524.389us 1 1 100.00
aes_stress 4.000s 150.804us 1 1 100.00
key_length 3 3 100.00
aes_smoke 2.000s 75.384us 1 1 100.00
aes_config_error 10.000s 524.389us 1 1 100.00
aes_stress 4.000s 150.804us 1 1 100.00
back2back 2 2 100.00
aes_stress 4.000s 150.804us 1 1 100.00
aes_b2b 8.000s 311.475us 1 1 100.00
backpressure 1 1 100.00
aes_stress 4.000s 150.804us 1 1 100.00
multi_message 3 4 75.00
aes_smoke 2.000s 75.384us 1 1 100.00
aes_config_error 10.000s 524.389us 1 1 100.00
aes_stress 4.000s 150.804us 1 1 100.00
aes_alert_reset 3601.000s 0.000us 0 1 0.00
failure_test 2 3 66.67
aes_man_cfg_err 3.000s 63.344us 1 1 100.00
aes_config_error 10.000s 524.389us 1 1 100.00
aes_alert_reset 3601.000s 0.000us 0 1 0.00
trigger_clear_test 1 1 100.00
aes_clear 2.000s 129.848us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 28.000s 10464.233us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 7.000s 407.199us 1 1 100.00
reset_recovery 0 1 0.00
aes_alert_reset 3601.000s 0.000us 0 1 0.00
stress 1 1 100.00
aes_stress 4.000s 150.804us 1 1 100.00
sideload 1 2 50.00
aes_stress 4.000s 150.804us 1 1 100.00
aes_sideload 5.000s 725.046us 0 1 0.00
deinitialization 1 1 100.00
aes_deinit 4.000s 124.266us 1 1 100.00
stress_all 0 1 0.00
aes_stress_all 11.000s 784.326us 0 1 0.00
gcm_save_and_restore 1 1 100.00
aes_gcm_save_restore 3.000s 159.330us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 2.000s 172.996us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 2.000s 89.398us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 2.000s 89.398us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 3.000s 299.289us 1 1 100.00
aes_csr_rw 1.000s 58.786us 1 1 100.00
aes_csr_aliasing 3.000s 233.194us 1 1 100.00
aes_same_csr_outstanding 2.000s 107.790us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 3.000s 299.289us 1 1 100.00
aes_csr_rw 1.000s 58.786us 1 1 100.00
aes_csr_aliasing 3.000s 233.194us 1 1 100.00
aes_same_csr_outstanding 2.000s 107.790us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 4.000s 313.749us 1 1 100.00
fault_inject 2 3 66.67
aes_fi 5.000s 214.743us 0 1 0.00
aes_control_fi 2.000s 51.672us 1 1 100.00
aes_cipher_fi 2.000s 72.838us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 99.146us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 99.146us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 99.146us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 99.146us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 165.845us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 6.000s 1409.173us 1 1 100.00
aes_tl_intg_err 2.000s 218.053us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 218.053us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 0 1 0.00
aes_alert_reset 3601.000s 0.000us 0 1 0.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 99.146us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 99.146us 1 1 100.00
sec_cm_main_config_sparse 3 4 75.00
aes_smoke 2.000s 75.384us 1 1 100.00
aes_stress 4.000s 150.804us 1 1 100.00
aes_alert_reset 3601.000s 0.000us 0 1 0.00
aes_core_fi 2.000s 353.265us 1 1 100.00
sec_cm_gcm_config_sparse 4 4 100.00
aes_gcm_save_restore 3.000s 159.330us 1 1 100.00
aes_config_error 10.000s 524.389us 1 1 100.00
aes_stress 4.000s 150.804us 1 1 100.00
aes_core_fi 2.000s 353.265us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 99.146us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 139.156us 1 1 100.00
aes_stress 4.000s 150.804us 1 1 100.00
sec_cm_key_sideload 1 2 50.00
aes_stress 4.000s 150.804us 1 1 100.00
aes_sideload 5.000s 725.046us 0 1 0.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 139.156us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 139.156us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 139.156us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 139.156us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 139.156us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 4.000s 150.804us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 4.000s 150.804us 1 1 100.00
sec_cm_main_fsm_sparse 0 1 0.00
aes_fi 5.000s 214.743us 0 1 0.00
sec_cm_main_fsm_redun 3 4 75.00
aes_fi 5.000s 214.743us 0 1 0.00
aes_control_fi 2.000s 51.672us 1 1 100.00
aes_cipher_fi 2.000s 72.838us 1 1 100.00
aes_ctr_fi 2.000s 103.041us 1 1 100.00
sec_cm_cipher_fsm_sparse 0 1 0.00
aes_fi 5.000s 214.743us 0 1 0.00
sec_cm_cipher_fsm_redun 2 3 66.67
aes_fi 5.000s 214.743us 0 1 0.00
aes_control_fi 2.000s 51.672us 1 1 100.00
aes_cipher_fi 2.000s 72.838us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 72.838us 1 1 100.00
sec_cm_ctr_fsm_sparse 0 1 0.00
aes_fi 5.000s 214.743us 0 1 0.00
sec_cm_ctr_fsm_redun 2 3 66.67
aes_fi 5.000s 214.743us 0 1 0.00
aes_control_fi 2.000s 51.672us 1 1 100.00
aes_ctr_fi 2.000s 103.041us 1 1 100.00
sec_cm_ghash_fsm_sparse 0 1 0.00
aes_fi 5.000s 214.743us 0 1 0.00
sec_cm_ctrl_sparse 3 4 75.00
aes_fi 5.000s 214.743us 0 1 0.00
aes_control_fi 2.000s 51.672us 1 1 100.00
aes_cipher_fi 2.000s 72.838us 1 1 100.00
aes_ctr_fi 2.000s 103.041us 1 1 100.00
sec_cm_main_fsm_global_esc 0 1 0.00
aes_alert_reset 3601.000s 0.000us 0 1 0.00
sec_cm_main_fsm_local_esc 3 4 75.00
aes_fi 5.000s 214.743us 0 1 0.00
aes_control_fi 2.000s 51.672us 1 1 100.00
aes_cipher_fi 2.000s 72.838us 1 1 100.00
aes_ctr_fi 2.000s 103.041us 1 1 100.00
sec_cm_cipher_fsm_local_esc 3 4 75.00
aes_fi 5.000s 214.743us 0 1 0.00
aes_control_fi 2.000s 51.672us 1 1 100.00
aes_cipher_fi 2.000s 72.838us 1 1 100.00
aes_ctr_fi 2.000s 103.041us 1 1 100.00
sec_cm_ctr_fsm_local_esc 2 3 66.67
aes_fi 5.000s 214.743us 0 1 0.00
aes_control_fi 2.000s 51.672us 1 1 100.00
aes_ctr_fi 2.000s 103.041us 1 1 100.00
sec_cm_ghash_fsm_local_esc 1 2 50.00
aes_ghash_fi 3.000s 106.798us 1 1 100.00
aes_fi 5.000s 214.743us 0 1 0.00
sec_cm_data_reg_local_esc 2 3 66.67
aes_fi 5.000s 214.743us 0 1 0.00
aes_control_fi 2.000s 51.672us 1 1 100.00
aes_cipher_fi 2.000s 72.838us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 3.000s 75.640us 0 1 0.00

Error Messages

   Test seed line log context
Job timed out after * minutes 1 test run
aes_alert_reset 114851725205457163582301418873433756023767930368978139268214301810364832252745 None
xmsim: *E,MEMALC: Memory not allocated for actual argument 'input_msg', passed to DPI task/function 'c_dpi_aes_crypt_message' call at line '*' in file '/nightly/current_run/scratch/master/aes_gcm_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_aes_env_*/aes_scoreboard.sv' at time * PS + *. 1 test run
aes_sideload 95265512758668617501402118704472987135629366711063309861798285880326076707243 4933
xmsim: *E,MEMALC: Memory not allocated for actual argument 'input_msg', passed to DPI task/function 'c_dpi_aes_crypt_message' call at line '748' in file '/nightly/current_run/scratch/master/aes_gcm_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_aes_env_0.1/aes_scoreboard.sv' at time 419626441 PS + 10.
xmsim: *E,MEMALC: Memory not allocated for actual argument 'input_msg', passed to DPI task/function 'c_dpi_aes_crypt_message' call at line '748' in file '/nightly/current_run/scratch/master/aes_gcm_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_aes_env_0.1/aes_scoreboard.sv' at time 419626441 PS + 10.
ERROR: Decryption finalizing failed
xmsim: *E,MEMALC: Memory not allocated for actual argument 'predicted_msg', passed to DPI task/function 'c_dpi_aes_crypt_message' call at line '748' in file '/nightly/current_run/scratch/master/aes_gcm_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_aes_env_0.1/aes_scoreboard.sv' at time 419626441 PS + 10.
UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard] 1 test run
aes_fi 22297511076030126695439563900721251099941766852274456251860916951598747969599 23826
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 1 test run
aes_stress_all 11356836374137646274343281296363396671892764262968192796204407772534398124326 52233
UVM_INFO @ 784325671 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done) 1 test run
aes_stress_all_with_rand_reset 88163633573198949459612995278401071172549631917388523369394645567569697277249 175
UVM_INFO @ 75640221 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---