Simulation Results: entropy_src/rng_16bits

 
11/08/2026 19:53:31 DVSim: v1.50.1 sha: 49df6ac json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 69.30 %
  • code
  • 82.24 %
  • assert
  • 73.50 %
  • func
  • 52.15 %
  • block
  • 94.02 %
  • line
  • 97.67 %
  • branch
  • 85.97 %
  • toggle
  • 52.60 %
  • FSM
  • 92.71 %
Validation stages
V1
83.33%
V2
100.00%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 2.000s 192.796us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 41.457us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 2.000s 27.530us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 7.000s 1609.525us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 5.000s 1408.082us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 2.000s 14.007us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 2.000s 27.530us 1 1 100.00
entropy_src_csr_aliasing 5.000s 1408.082us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 3 3 100.00
entropy_src_smoke 2.000s 192.796us 1 1 100.00
entropy_src_rng 290.000s 13031.102us 1 1 100.00
entropy_src_fw_ov 76.000s 13050.719us 1 1 100.00
firmware_mode 1 1 100.00
entropy_src_fw_ov 76.000s 13050.719us 1 1 100.00
rng_mode 1 1 100.00
entropy_src_rng 290.000s 13031.102us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 122.000s 13154.765us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 290.000s 13031.102us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 290.000s 13031.102us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 290.000s 13031.102us 1 1 100.00
entropy_src_intr 32.000s 897.724us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 290.000s 13031.102us 1 1 100.00
entropy_src_functional_alerts 8.000s 190.602us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 280.000s 13264.834us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 38.172us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 3.000s 21.658us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 1.000s 133.550us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 1.000s 39.888us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 3.000s 59.667us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 3.000s 59.667us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 41.457us 1 1 100.00
entropy_src_csr_rw 2.000s 27.530us 1 1 100.00
entropy_src_csr_aliasing 5.000s 1408.082us 1 1 100.00
entropy_src_same_csr_outstanding 4.000s 277.986us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 41.457us 1 1 100.00
entropy_src_csr_rw 2.000s 27.530us 1 1 100.00
entropy_src_csr_aliasing 5.000s 1408.082us 1 1 100.00
entropy_src_same_csr_outstanding 4.000s 277.986us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 2.000s 135.050us 1 1 100.00
entropy_src_tl_intg_err 4.000s 203.231us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 290.000s 13031.102us 1 1 100.00
entropy_src_cfg_regwen 2.000s 40.478us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 290.000s 13031.102us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 290.000s 13031.102us 1 1 100.00
sec_cm_intersig_mubi 2 2 100.00
entropy_src_rng 290.000s 13031.102us 1 1 100.00
entropy_src_fw_ov 76.000s 13050.719us 1 1 100.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 38.172us 1 1 100.00
entropy_src_sec_cm 2.000s 135.050us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 38.172us 1 1 100.00
entropy_src_sec_cm 2.000s 135.050us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 290.000s 13031.102us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 38.172us 1 1 100.00
entropy_src_sec_cm 2.000s 135.050us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 38.172us 1 1 100.00
entropy_src_sec_cm 2.000s 135.050us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 38.172us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 8.000s 190.602us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 4.000s 203.231us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 84.000s 13072.721us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
entropy_src_stress_all_with_rand_reset 2.000s 10.765us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror adaptp_lo_total_fails 1 test run
entropy_src_stress_all_with_rand_reset 32435473452622262594672942406912309849324115773299144755992931697681517534669 112
UVM_INFO @ 10764931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror alert_fail_counts 1 test run
entropy_src_csr_mem_rw_with_rand_reset 23091488456887649743710504456167529030663695058553613032480133624700594542441 113
UVM_INFO @ 14007497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---