Simulation Results

Simulation Results: keymgr_dpe/darjeeling

12/08/2026 19:42:27 DVSim: v1.50.1 sha: c96e07a json Branch: master Tool: xcelium [unknown]

Coverage statistics

Total
66.09 %

code
83.71 %

assert
97.18 %

func
17.37 %

block
97.89 %

line
98.64 %

branch
93.15 %

toggle
61.52 %

FSM
81.54 %

Validation stages

V1		100.00%
V2		100.00%
V2S		100.00%

V1

6/6 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	keymgr_dpe_smoke	12.000s	1110.625us	1	1	100.00
csr_hw_reset				1	1	100.00
	keymgr_dpe_csr_hw_reset	2.000s	112.999us	1	1	100.00
csr_rw				1	1	100.00
	keymgr_dpe_csr_rw	1.000s	12.477us	1	1	100.00
csr_bit_bash				1	1	100.00
	keymgr_dpe_csr_bit_bash	7.000s	1977.983us	1	1	100.00
csr_aliasing				1	1	100.00
	keymgr_dpe_csr_aliasing	4.000s	347.961us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	keymgr_dpe_csr_mem_rw_with_rand_reset	2.000s	53.821us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	keymgr_dpe_csr_rw	1.000s	12.477us	1	1	100.00
	keymgr_dpe_csr_aliasing	4.000s	347.961us	1	1	100.00

V2

7/7 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
intr_test				1	1	100.00
	keymgr_dpe_intr_test	1.000s	12.553us	1	1	100.00
alert_test				1	1	100.00
	keymgr_dpe_alert_test	2.000s	17.549us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	keymgr_dpe_tl_errors	3.000s	218.372us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	keymgr_dpe_tl_errors	3.000s	218.372us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	keymgr_dpe_csr_hw_reset	2.000s	112.999us	1	1	100.00
	keymgr_dpe_csr_rw	1.000s	12.477us	1	1	100.00
	keymgr_dpe_csr_aliasing	4.000s	347.961us	1	1	100.00
	keymgr_dpe_same_csr_outstanding	2.000s	71.842us	1	1	100.00
tl_d_partial_access				4	4	100.00
	keymgr_dpe_csr_hw_reset	2.000s	112.999us	1	1	100.00
	keymgr_dpe_csr_rw	1.000s	12.477us	1	1	100.00
	keymgr_dpe_csr_aliasing	4.000s	347.961us	1	1	100.00
	keymgr_dpe_same_csr_outstanding	2.000s	71.842us	1	1	100.00

V2S

4/4 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	keymgr_dpe_sec_cm	7.000s	1475.392us	1	1	100.00
	keymgr_dpe_tl_intg_err	3.000s	231.421us	1	1	100.00
shadow_reg_update_error				1	1	100.00
	keymgr_dpe_shadow_reg_errors	3.000s	115.420us	1	1	100.00
shadow_reg_read_clear_staged_value				1	1	100.00
	keymgr_dpe_shadow_reg_errors	3.000s	115.420us	1	1	100.00
shadow_reg_storage_error				1	1	100.00
	keymgr_dpe_shadow_reg_errors	3.000s	115.420us	1	1	100.00
shadowed_reset_glitch				1	1	100.00
	keymgr_dpe_shadow_reg_errors	3.000s	115.420us	1	1	100.00
shadow_reg_update_error_with_csr_rw				1	1	100.00
	keymgr_dpe_shadow_reg_errors_with_csr_rw	3.000s	157.420us	1	1	100.00
prim_count_check				1	1	100.00
	keymgr_dpe_sec_cm	7.000s	1475.392us	1	1	100.00
prim_fsm_check				1	1	100.00
	keymgr_dpe_sec_cm	7.000s	1475.392us	1	1	100.00