Simulation Results: aes/gcm_masked

 
13/08/2026 20:41:30 DVSim: v1.50.1 sha: e58679d json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 86.24 %
  • code
  • 95.60 %
  • assert
  • 98.29 %
  • func
  • 64.83 %
  • block
  • 95.71 %
  • line
  • 97.38 %
  • branch
  • 89.54 %
  • toggle
  • 98.05 %
  • FSM
  • 97.42 %
Validation stages
V1
100.00%
V2
94.74%
V2S
83.33%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 74.562us 1 1 100.00
smoke 1 1 100.00
aes_smoke 3.000s 162.099us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 104.005us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 1.000s 55.249us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 6.000s 261.992us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 2.000s 72.424us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 121.633us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 1.000s 55.249us 1 1 100.00
aes_csr_aliasing 2.000s 72.424us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 3.000s 162.099us 1 1 100.00
aes_config_error 2.000s 179.956us 1 1 100.00
aes_stress 4.000s 289.174us 1 1 100.00
key_length 3 3 100.00
aes_smoke 3.000s 162.099us 1 1 100.00
aes_config_error 2.000s 179.956us 1 1 100.00
aes_stress 4.000s 289.174us 1 1 100.00
back2back 2 2 100.00
aes_stress 4.000s 289.174us 1 1 100.00
aes_b2b 16.000s 897.242us 1 1 100.00
backpressure 1 1 100.00
aes_stress 4.000s 289.174us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 3.000s 162.099us 1 1 100.00
aes_config_error 2.000s 179.956us 1 1 100.00
aes_stress 4.000s 289.174us 1 1 100.00
aes_alert_reset 3.000s 411.101us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 1.000s 112.985us 1 1 100.00
aes_config_error 2.000s 179.956us 1 1 100.00
aes_alert_reset 3.000s 411.101us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 4.000s 374.634us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 12.000s 3723.337us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 9.000s 1113.493us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 3.000s 411.101us 1 1 100.00
stress 1 1 100.00
aes_stress 4.000s 289.174us 1 1 100.00
sideload 2 2 100.00
aes_stress 4.000s 289.174us 1 1 100.00
aes_sideload 3.000s 141.465us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 4.000s 93.318us 1 1 100.00
stress_all 0 1 0.00
aes_stress_all 113.000s 31108.272us 0 1 0.00
gcm_save_and_restore 1 1 100.00
aes_gcm_save_restore 2.000s 207.085us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 2.000s 54.852us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 2.000s 137.986us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 2.000s 137.986us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 104.005us 1 1 100.00
aes_csr_rw 1.000s 55.249us 1 1 100.00
aes_csr_aliasing 2.000s 72.424us 1 1 100.00
aes_same_csr_outstanding 3.000s 69.988us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 104.005us 1 1 100.00
aes_csr_rw 1.000s 55.249us 1 1 100.00
aes_csr_aliasing 2.000s 72.424us 1 1 100.00
aes_same_csr_outstanding 3.000s 69.988us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 3.000s 239.426us 1 1 100.00
fault_inject 1 3 33.33
aes_fi 3.000s 217.470us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_cipher_fi 2.000s 50.457us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 328.118us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 328.118us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 328.118us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 328.118us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 162.927us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 6.000s 705.236us 1 1 100.00
aes_tl_intg_err 2.000s 309.818us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 309.818us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 3.000s 411.101us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 328.118us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 328.118us 1 1 100.00
sec_cm_main_config_sparse 3 4 75.00
aes_smoke 3.000s 162.099us 1 1 100.00
aes_stress 4.000s 289.174us 1 1 100.00
aes_alert_reset 3.000s 411.101us 1 1 100.00
aes_core_fi 27.000s 10008.979us 0 1 0.00
sec_cm_gcm_config_sparse 3 4 75.00
aes_gcm_save_restore 2.000s 207.085us 1 1 100.00
aes_config_error 2.000s 179.956us 1 1 100.00
aes_stress 4.000s 289.174us 1 1 100.00
aes_core_fi 27.000s 10008.979us 0 1 0.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 328.118us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 76.414us 1 1 100.00
aes_stress 4.000s 289.174us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 4.000s 289.174us 1 1 100.00
aes_sideload 3.000s 141.465us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 76.414us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 76.414us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 76.414us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 76.414us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 76.414us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 4.000s 289.174us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 4.000s 289.174us 1 1 100.00
sec_cm_main_fsm_sparse 0 1 0.00
aes_fi 3.000s 217.470us 0 1 0.00
sec_cm_main_fsm_redun 2 4 50.00
aes_fi 3.000s 217.470us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_cipher_fi 2.000s 50.457us 1 1 100.00
aes_ctr_fi 2.000s 57.694us 1 1 100.00
sec_cm_cipher_fsm_sparse 0 1 0.00
aes_fi 3.000s 217.470us 0 1 0.00
sec_cm_cipher_fsm_redun 1 3 33.33
aes_fi 3.000s 217.470us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_cipher_fi 2.000s 50.457us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 50.457us 1 1 100.00
sec_cm_ctr_fsm_sparse 0 1 0.00
aes_fi 3.000s 217.470us 0 1 0.00
sec_cm_ctr_fsm_redun 1 3 33.33
aes_fi 3.000s 217.470us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_ctr_fi 2.000s 57.694us 1 1 100.00
sec_cm_ghash_fsm_sparse 0 1 0.00
aes_fi 3.000s 217.470us 0 1 0.00
sec_cm_ctrl_sparse 2 4 50.00
aes_fi 3.000s 217.470us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_cipher_fi 2.000s 50.457us 1 1 100.00
aes_ctr_fi 2.000s 57.694us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 3.000s 411.101us 1 1 100.00
sec_cm_main_fsm_local_esc 2 4 50.00
aes_fi 3.000s 217.470us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_cipher_fi 2.000s 50.457us 1 1 100.00
aes_ctr_fi 2.000s 57.694us 1 1 100.00
sec_cm_cipher_fsm_local_esc 2 4 50.00
aes_fi 3.000s 217.470us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_cipher_fi 2.000s 50.457us 1 1 100.00
aes_ctr_fi 2.000s 57.694us 1 1 100.00
sec_cm_ctr_fsm_local_esc 1 3 33.33
aes_fi 3.000s 217.470us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_ctr_fi 2.000s 57.694us 1 1 100.00
sec_cm_ghash_fsm_local_esc 1 2 50.00
aes_ghash_fi 2.000s 59.194us 1 1 100.00
aes_fi 3.000s 217.470us 0 1 0.00
sec_cm_data_reg_local_esc 1 3 33.33
aes_fi 3.000s 217.470us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_cipher_fi 2.000s 50.457us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 2.000s 8.617us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_scoreboard.sv:923) scoreboard [scoreboard] 1 test run
aes_fi 100650703900325996772176587638372572003610661541516871626313492413192821520741 11202
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 3
----| Seen: 2
----| Expected corrupted: 0
Job timed out after * minutes 1 test run
aes_control_fi 36314723447128178597334001505921710694714315074370418793761333976571334507566 None
UVM_FATAL (aes_core_fi_vseq.sv:70) [aes_core_fi_vseq] wait timeout occurred! 1 test run
aes_core_fi 46550278183498431498113237223323296535573224991148787454710180836084755981364 149
UVM_INFO @ 10008979144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 1 test run
aes_stress_all 47760447454633066972434182553276265491767168464882527256722671140741142999820 387981
UVM_INFO @ 31108271977 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1230) [aes_common_vseq] Check failed (vseq_done) 1 test run
aes_stress_all_with_rand_reset 90433910788590190966589699709976836114481018186354552583968233343017335743927 138
UVM_INFO @ 8616629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---