Simulation Results: kmac/unmasked

 
13/08/2026 20:41:30 DVSim: v1.50.1 sha: e58679d json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 77.98 %
  • code
  • 63.56 %
  • assert
  • 94.45 %
  • func
  • 75.93 %
  • line
  • 95.21 %
  • branch
  • 87.66 %
  • cond
  • 82.73 %
  • toggle
  • 21.54 %
  • FSM
  • 30.66 %
Validation stages
V1
100.00%
V2
68.97%
V2S
62.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 20.880s 9524.560us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.910s 72.946us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.910s 76.029us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 15.170s 1597.899us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 3.780s 907.994us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 2.640s 291.257us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.910s 76.029us 1 1 100.00
kmac_csr_aliasing 3.780s 907.994us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.760s 39.874us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.210s 19.382us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 2394.790s 220619.352us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 331.090s 97369.669us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1394.150s 119227.446us 1 1 100.00
kmac_test_vectors_sha3_256 29.480s 6229.808us 1 1 100.00
kmac_test_vectors_sha3_384 916.090s 19830.149us 1 1 100.00
kmac_test_vectors_sha3_512 14.560s 1304.457us 1 1 100.00
kmac_test_vectors_shake_128 165.840s 29343.608us 1 1 100.00
kmac_test_vectors_shake_256 1256.170s 28089.642us 1 1 100.00
kmac_test_vectors_kmac 2.030s 172.298us 1 1 100.00
kmac_test_vectors_kmac_xof 1.600s 188.815us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 183.770s 18121.691us 1 1 100.00
app 0 1 0.00
kmac_app 4.380s 1551.686us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 3.820s 409.057us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 1.130s 10.840us 0 1 0.00
error 0 1 0.00
kmac_error 13.180s 8196.206us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 0.800s 7.841us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 1.440s 229.581us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 16.760s 2830.426us 1 1 100.00
entropy_mode_error 0 1 0.00
kmac_entropy_mode_error 12.110s 542.045us 0 1 0.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.800s 31.706us 0 1 0.00
lc_escalation 0 1 0.00
kmac_lc_escalation 0.820s 1.535us 0 1 0.00
stress_all 1 1 100.00
kmac_stress_all 184.810s 9805.137us 1 1 100.00
intr_test 1 1 100.00
kmac_intr_test 0.900s 12.908us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.960s 43.122us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 1.640s 133.000us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 1.640s 133.000us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.910s 72.946us 1 1 100.00
kmac_csr_rw 0.910s 76.029us 1 1 100.00
kmac_csr_aliasing 3.780s 907.994us 1 1 100.00
kmac_same_csr_outstanding 1.770s 62.440us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.910s 72.946us 1 1 100.00
kmac_csr_rw 0.910s 76.029us 1 1 100.00
kmac_csr_aliasing 3.780s 907.994us 1 1 100.00
kmac_same_csr_outstanding 1.770s 62.440us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 2.090s 178.348us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 2.090s 178.348us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 2.090s 178.348us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 2.090s 178.348us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 4.280s 1887.043us 1 1 100.00
tl_intg_err 1 2 50.00
kmac_sec_cm 0.980s 24.515us 0 1 0.00
kmac_tl_intg_err 3.640s 356.548us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 3.640s 356.548us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 0 1 0.00
kmac_lc_escalation 0.820s 1.535us 0 1 0.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 20.880s 9524.560us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 183.770s 18121.691us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 2.090s 178.348us 1 1 100.00
sec_cm_fsm_sparse 0 1 0.00
kmac_sec_cm 0.980s 24.515us 0 1 0.00
sec_cm_ctr_redun 0 1 0.00
kmac_sec_cm 0.980s 24.515us 0 1 0.00
sec_cm_packer_ctr_redun 0 1 0.00
kmac_sec_cm 0.980s 24.515us 0 1 0.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 20.880s 9524.560us 1 1 100.00
sec_cm_fsm_global_esc 0 1 0.00
kmac_lc_escalation 0.820s 1.535us 0 1 0.00
sec_cm_fsm_local_esc 0 1 0.00
kmac_sec_cm 0.980s 24.515us 0 1 0.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 3.680s 81.066us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 20.880s 9524.560us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 0.960s 93.011us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 5 test runs
kmac_sideload_invalid 25968578356055007078374894864627059824229484275478930686241378757289532892783 85
UVM_INFO @ 229581479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 93512246616199964659571247490290201367400777771276358106657623580360684241379 78
UVM_INFO @ 409057287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 42520045689620933724194841025707959152330325409129809332911682703365242383867 77
UVM_INFO @ 10840108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 114561236371244730181526688410464736379765094254533816887033591751097813264928 83
UVM_INFO @ 8196206478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 92644684365538106660684496234893417020727182172455689807492414411922453032251 77
UVM_INFO @ 31705749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (kmac_scoreboard.sv:524) scoreboard [scoreboard] Saw request be handled for app * when that app was not selected. 5 test runs
kmac_app 78537287000000353717665398186429004471567039506181683857041282610564461154821 78
UVM_INFO @ 1551686463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_mubi 86833052803631095609790878987041980816563489377987407673753768507422739137302 80
UVM_INFO @ 81066060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_key_error 45046851136445559118776768103111675169669338555813306885126320149024085080611 77
UVM_INFO @ 7840790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_lc_escalation 10826634255504625871373587240375623729699919966033649675949109158749817528153 77
UVM_INFO @ 1535353 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 9296542528136300854960689890227583717450564591062961874938431664671269122119 94
UVM_INFO @ 93011193 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_entropy_mode_error 10424831352124631541266104082979072337335102944221765065762078057584415829227 86
UVM_ERROR @ 542045383 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 542045383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [sequencer] Item_done() called with no outstanding requests. Each call to item_done() must be paired with a previous call to get_next_item(). 1 test run
kmac_sec_cm 45355814479817748351547508221139813163662412651112381691018199080035909992052 82
UVM_INFO @ 24515005 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---