Simulation Results: aes/gcm_masked

 
17/08/2026 16:37:20 DVSim: v1.50.1 sha: b9d39c6 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 87.04 %
  • code
  • 95.39 %
  • assert
  • 98.29 %
  • func
  • 67.43 %
  • block
  • 95.88 %
  • line
  • 97.55 %
  • branch
  • 89.82 %
  • toggle
  • 98.05 %
  • FSM
  • 96.13 %
Validation stages
V1
100.00%
V2
100.00%
V2S
88.89%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 66.617us 1 1 100.00
smoke 1 1 100.00
aes_smoke 5.000s 498.148us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 221.722us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 2.000s 118.521us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 6.000s 853.009us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 2.000s 99.259us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 1.000s 77.610us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 2.000s 118.521us 1 1 100.00
aes_csr_aliasing 2.000s 99.259us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 5.000s 498.148us 1 1 100.00
aes_config_error 3.000s 237.857us 1 1 100.00
aes_stress 6.000s 234.889us 1 1 100.00
key_length 3 3 100.00
aes_smoke 5.000s 498.148us 1 1 100.00
aes_config_error 3.000s 237.857us 1 1 100.00
aes_stress 6.000s 234.889us 1 1 100.00
back2back 2 2 100.00
aes_stress 6.000s 234.889us 1 1 100.00
aes_b2b 16.000s 2521.872us 1 1 100.00
backpressure 1 1 100.00
aes_stress 6.000s 234.889us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 5.000s 498.148us 1 1 100.00
aes_config_error 3.000s 237.857us 1 1 100.00
aes_stress 6.000s 234.889us 1 1 100.00
aes_alert_reset 2.000s 65.465us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 221.361us 1 1 100.00
aes_config_error 3.000s 237.857us 1 1 100.00
aes_alert_reset 2.000s 65.465us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 3.000s 247.931us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 6.000s 620.161us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 8.000s 904.192us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 2.000s 65.465us 1 1 100.00
stress 1 1 100.00
aes_stress 6.000s 234.889us 1 1 100.00
sideload 2 2 100.00
aes_stress 6.000s 234.889us 1 1 100.00
aes_sideload 3.000s 159.459us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 3.000s 106.535us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 6.000s 1033.405us 1 1 100.00
gcm_save_and_restore 1 1 100.00
aes_gcm_save_restore 3.000s 148.676us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 2.000s 91.896us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 3.000s 174.643us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 3.000s 174.643us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 221.722us 1 1 100.00
aes_csr_rw 2.000s 118.521us 1 1 100.00
aes_csr_aliasing 2.000s 99.259us 1 1 100.00
aes_same_csr_outstanding 2.000s 220.466us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 221.722us 1 1 100.00
aes_csr_rw 2.000s 118.521us 1 1 100.00
aes_csr_aliasing 2.000s 99.259us 1 1 100.00
aes_same_csr_outstanding 2.000s 220.466us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 0 1 0.00
aes_reseed 9.000s 441.258us 0 1 0.00
fault_inject 2 3 66.67
aes_fi 4.000s 210.236us 0 1 0.00
aes_control_fi 2.000s 59.356us 1 1 100.00
aes_cipher_fi 2.000s 191.262us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 95.814us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 95.814us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 95.814us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 95.814us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 225.710us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 8.000s 3301.306us 1 1 100.00
aes_tl_intg_err 2.000s 313.690us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 313.690us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 2.000s 65.465us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 95.814us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 95.814us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 5.000s 498.148us 1 1 100.00
aes_stress 6.000s 234.889us 1 1 100.00
aes_alert_reset 2.000s 65.465us 1 1 100.00
aes_core_fi 2.000s 76.716us 1 1 100.00
sec_cm_gcm_config_sparse 4 4 100.00
aes_gcm_save_restore 3.000s 148.676us 1 1 100.00
aes_config_error 3.000s 237.857us 1 1 100.00
aes_stress 6.000s 234.889us 1 1 100.00
aes_core_fi 2.000s 76.716us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 95.814us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 59.686us 1 1 100.00
aes_stress 6.000s 234.889us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 6.000s 234.889us 1 1 100.00
aes_sideload 3.000s 159.459us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 59.686us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 59.686us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 59.686us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 59.686us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 59.686us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 6.000s 234.889us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 6.000s 234.889us 1 1 100.00
sec_cm_main_fsm_sparse 0 1 0.00
aes_fi 4.000s 210.236us 0 1 0.00
sec_cm_main_fsm_redun 3 4 75.00
aes_fi 4.000s 210.236us 0 1 0.00
aes_control_fi 2.000s 59.356us 1 1 100.00
aes_cipher_fi 2.000s 191.262us 1 1 100.00
aes_ctr_fi 2.000s 92.655us 1 1 100.00
sec_cm_cipher_fsm_sparse 0 1 0.00
aes_fi 4.000s 210.236us 0 1 0.00
sec_cm_cipher_fsm_redun 2 3 66.67
aes_fi 4.000s 210.236us 0 1 0.00
aes_control_fi 2.000s 59.356us 1 1 100.00
aes_cipher_fi 2.000s 191.262us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 191.262us 1 1 100.00
sec_cm_ctr_fsm_sparse 0 1 0.00
aes_fi 4.000s 210.236us 0 1 0.00
sec_cm_ctr_fsm_redun 2 3 66.67
aes_fi 4.000s 210.236us 0 1 0.00
aes_control_fi 2.000s 59.356us 1 1 100.00
aes_ctr_fi 2.000s 92.655us 1 1 100.00
sec_cm_ghash_fsm_sparse 0 1 0.00
aes_fi 4.000s 210.236us 0 1 0.00
sec_cm_ctrl_sparse 3 4 75.00
aes_fi 4.000s 210.236us 0 1 0.00
aes_control_fi 2.000s 59.356us 1 1 100.00
aes_cipher_fi 2.000s 191.262us 1 1 100.00
aes_ctr_fi 2.000s 92.655us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 2.000s 65.465us 1 1 100.00
sec_cm_main_fsm_local_esc 3 4 75.00
aes_fi 4.000s 210.236us 0 1 0.00
aes_control_fi 2.000s 59.356us 1 1 100.00
aes_cipher_fi 2.000s 191.262us 1 1 100.00
aes_ctr_fi 2.000s 92.655us 1 1 100.00
sec_cm_cipher_fsm_local_esc 3 4 75.00
aes_fi 4.000s 210.236us 0 1 0.00
aes_control_fi 2.000s 59.356us 1 1 100.00
aes_cipher_fi 2.000s 191.262us 1 1 100.00
aes_ctr_fi 2.000s 92.655us 1 1 100.00
sec_cm_ctr_fsm_local_esc 2 3 66.67
aes_fi 4.000s 210.236us 0 1 0.00
aes_control_fi 2.000s 59.356us 1 1 100.00
aes_ctr_fi 2.000s 92.655us 1 1 100.00
sec_cm_ghash_fsm_local_esc 1 2 50.00
aes_ghash_fi 1.000s 71.589us 1 1 100.00
aes_fi 4.000s 210.236us 0 1 0.00
sec_cm_data_reg_local_esc 2 3 66.67
aes_fi 4.000s 210.236us 0 1 0.00
aes_control_fi 2.000s 59.356us 1 1 100.00
aes_cipher_fi 2.000s 191.262us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 3.000s 66.625us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 1 test run
aes_reseed 68697700928703647778897221588260262817337887506068065250648439820178644548430 25528
UVM_INFO @ 441258467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:923) scoreboard [scoreboard] 1 test run
aes_fi 39719906646805759154679870587170512146229153688739670609310339545687932281440 22638
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 6
----| Seen: 5
----| Expected corrupted: 0
UVM_FATAL (aes_base_vseq.sv:322) virtual_sequencer [aes_reseed_vseq] Expected GCM phase GCM_AAD, got GCM_TEXT 1 test run
aes_stress_all_with_rand_reset 87186218411374441375154876588406533526865623998658718580440347988937072817652 171
UVM_INFO @ 66625036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---