Simulation Results: entropy_src/rng_16bits

 
18/08/2026 18:34:25 DVSim: v1.50.1 sha: 2c5d921 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 70.21 %
  • code
  • 81.25 %
  • assert
  • 74.06 %
  • func
  • 55.32 %
  • block
  • 93.83 %
  • line
  • 96.61 %
  • branch
  • 85.68 %
  • toggle
  • 52.10 %
  • FSM
  • 90.62 %
Validation stages
V1
83.33%
V2
93.75%
V2S
85.71%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 2.000s 47.676us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 319.950us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 2.000s 17.109us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 9.000s 505.627us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 5.000s 738.563us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 2.000s 72.300us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 2.000s 17.109us 1 1 100.00
entropy_src_csr_aliasing 5.000s 738.563us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 3 3 100.00
entropy_src_smoke 2.000s 47.676us 1 1 100.00
entropy_src_rng 79.000s 14131.837us 1 1 100.00
entropy_src_fw_ov 43.000s 13141.777us 1 1 100.00
firmware_mode 1 1 100.00
entropy_src_fw_ov 43.000s 13141.777us 1 1 100.00
rng_mode 1 1 100.00
entropy_src_rng 79.000s 14131.837us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 207.000s 13076.596us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 79.000s 14131.837us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 79.000s 14131.837us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 79.000s 14131.837us 1 1 100.00
entropy_src_intr 13.000s 527.228us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 79.000s 14131.837us 1 1 100.00
entropy_src_functional_alerts 6.000s 718.583us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 298.000s 13129.340us 1 1 100.00
functional_errors 0 1 0.00
entropy_src_functional_errors 70.000s 10027.384us 0 1 0.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 3.000s 76.999us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 1.000s 21.882us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 2.000s 34.961us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 7.000s 773.806us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 7.000s 773.806us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 319.950us 1 1 100.00
entropy_src_csr_rw 2.000s 17.109us 1 1 100.00
entropy_src_csr_aliasing 5.000s 738.563us 1 1 100.00
entropy_src_same_csr_outstanding 2.000s 51.235us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 319.950us 1 1 100.00
entropy_src_csr_rw 2.000s 17.109us 1 1 100.00
entropy_src_csr_aliasing 5.000s 738.563us 1 1 100.00
entropy_src_same_csr_outstanding 2.000s 51.235us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 3.000s 99.903us 1 1 100.00
entropy_src_tl_intg_err 7.000s 359.087us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 79.000s 14131.837us 1 1 100.00
entropy_src_cfg_regwen 2.000s 32.447us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 79.000s 14131.837us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 79.000s 14131.837us 1 1 100.00
sec_cm_intersig_mubi 2 2 100.00
entropy_src_rng 79.000s 14131.837us 1 1 100.00
entropy_src_fw_ov 43.000s 13141.777us 1 1 100.00
sec_cm_main_sm_fsm_sparse 1 2 50.00
entropy_src_functional_errors 70.000s 10027.384us 0 1 0.00
entropy_src_sec_cm 3.000s 99.903us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 1 2 50.00
entropy_src_functional_errors 70.000s 10027.384us 0 1 0.00
entropy_src_sec_cm 3.000s 99.903us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 79.000s 14131.837us 1 1 100.00
sec_cm_fifo_ctr_redun 1 2 50.00
entropy_src_functional_errors 70.000s 10027.384us 0 1 0.00
entropy_src_sec_cm 3.000s 99.903us 1 1 100.00
sec_cm_ctr_redun 1 2 50.00
entropy_src_functional_errors 70.000s 10027.384us 0 1 0.00
entropy_src_sec_cm 3.000s 99.903us 1 1 100.00
sec_cm_ctr_local_esc 0 1 0.00
entropy_src_functional_errors 70.000s 10027.384us 0 1 0.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 6.000s 718.583us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 7.000s 359.087us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 313.000s 13045.766us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
entropy_src_stress_all_with_rand_reset 25.000s 3699.775us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (entropy_src_scoreboard.sv:1661) scoreboard [scoreboard] invalid csr: entropy_src_reg_block.extht_hi_threshold 1 test run
entropy_src_stress_all_with_rand_reset 10866035362441185612749516020440003811345749221070861154244564032007692241155 578
UVM_INFO @ 3699774652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout entropy_src_reg_block.err_code.sfifo_observe_err (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) 1 test run
entropy_src_functional_errors 74819042576865101707526825565138861180319293910243593238579177181076142314745 159
UVM_INFO @ 10027384280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror alert_fail_counts 1 test run
entropy_src_csr_mem_rw_with_rand_reset 17057623468819661919782334092446338278090611077496738000649146885005143171855 113
UVM_INFO @ 72299809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---