Simulation Results: mbx

 
18/08/2026 18:34:25 DVSim: v1.50.1 sha: 2c5d921 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 87.51 %
  • code
  • 89.42 %
  • assert
  • 97.43 %
  • func
  • 75.68 %
  • block
  • 96.88 %
  • line
  • 96.71 %
  • branch
  • 91.89 %
  • toggle
  • 79.67 %
Validation stages
V1
83.33%
V2
81.82%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_smoke 1 1 100.00
mbx_smoke 14.000s 849.385us 1 1 100.00
csr_hw_reset 1 1 100.00
mbx_csr_hw_reset 1.000s 46.666us 1 1 100.00
csr_rw 1 1 100.00
mbx_csr_rw 1.000s 41.316us 1 1 100.00
csr_bit_bash 1 1 100.00
mbx_csr_bit_bash 4.000s 447.501us 1 1 100.00
csr_aliasing 1 1 100.00
mbx_csr_aliasing 2.000s 81.673us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
mbx_csr_mem_rw_with_rand_reset 2.000s 30.739us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
mbx_csr_rw 1.000s 41.316us 1 1 100.00
mbx_csr_aliasing 2.000s 81.673us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_stress 1 1 100.00
mbx_stress 96.000s 13311.093us 1 1 100.00
mbx_max_activity 0 1 0.00
mbx_stress_zero_delays 3.000s 431.654us 0 1 0.00
mbx_imbx_oob 1 1 100.00
mbx_imbx_oob 41.000s 9996.642us 1 1 100.00
mbx_doe_intr_msg 1 1 100.00
mbx_doe_intr_msg 12.000s 3019.868us 1 1 100.00
alert_test 1 1 100.00
mbx_alert_test 1.000s 42.306us 1 1 100.00
intr_test 1 1 100.00
mbx_intr_test 1.000s 44.725us 1 1 100.00
tl_d_oob_addr_access 0 1 0.00
mbx_tl_errors 1.000s 1.908us 0 1 0.00
tl_d_illegal_access 0 1 0.00
mbx_tl_errors 1.000s 1.908us 0 1 0.00
tl_d_outstanding_access 4 4 100.00
mbx_csr_hw_reset 1.000s 46.666us 1 1 100.00
mbx_csr_rw 1.000s 41.316us 1 1 100.00
mbx_csr_aliasing 2.000s 81.673us 1 1 100.00
mbx_same_csr_outstanding 2.000s 56.014us 1 1 100.00
tl_d_partial_access 4 4 100.00
mbx_csr_hw_reset 1.000s 46.666us 1 1 100.00
mbx_csr_rw 1.000s 41.316us 1 1 100.00
mbx_csr_aliasing 2.000s 81.673us 1 1 100.00
mbx_same_csr_outstanding 2.000s 56.014us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
mbx_tl_intg_err 1.000s 206.923us 1 1 100.00
mbx_sec_cm 1.000s 15.804us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:696) scoreboard [scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted *, but saw *). 2 test runs
mbx_tl_errors 94842132658308563307472902473440077781476101993013312622703058472828121590951 85
TL item was: req: (cip_tl_seq_item@17861) { a_addr: 'hdadfc594 a_data: 'ha3189cb9 a_mask: 'h1 a_size: 'h0 a_param: 'h0 a_source: 'h38 a_opcode: 'h0 a_user: 'h279f2 d_param: 'h0 d_source: 'h38 d_data: 'h0 d_size: 'h0 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h152a a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 1908190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
mbx_csr_mem_rw_with_rand_reset 74538116695746156297149678411923511038022400767769968275329220243928347086229 92
TL item was: req: (cip_tl_seq_item@23032) { a_addr: 'he503b234 a_data: 'h5e5319a7 a_mask: 'hd a_size: 'h2 a_param: 'h0 a_source: 'h74 a_opcode: 'h1 a_user: 'h24869 d_param: 'h0 d_source: 'h74 d_data: 'h0 d_size: 'h2 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h1caa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 30738781 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (mbx_scoreboard.sv:537) [scoreboard] Check failed m_ib_data_q.size() != * (* [*] vs * [*]) No write data in WDATA register 1 test run
mbx_stress_zero_delays 24343571235527079145799813661682209586056681726234552158193788385855164640996 416
UVM_INFO @ 431653510 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---