Simulation Results: ac_range_check

 
19/08/2026 21:14:37 DVSim: v1.50.1 sha: e688e72 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 82.92 %
  • code
  • 93.09 %
  • assert
  • 97.75 %
  • func
  • 57.93 %
  • block
  • 99.10 %
  • line
  • 99.93 %
  • branch
  • 98.24 %
  • toggle
  • 81.09 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 53.000s 6197.800us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 83.000s 2517.027us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 10.000s 155.890us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 10.000s 22.210us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 58.000s 2744.144us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 30.000s 15976.351us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 9.000s 27.572us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 10.000s 22.210us 1 1 100.00
ac_range_check_csr_aliasing 30.000s 15976.351us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 11.000s 63.419us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 46.000s 5653.588us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 294.000s 42089.046us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 9.000s 18.771us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 9.000s 17.061us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 8.000s 60.395us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 8.000s 60.395us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 10.000s 155.890us 1 1 100.00
ac_range_check_csr_rw 10.000s 22.210us 1 1 100.00
ac_range_check_csr_aliasing 30.000s 15976.351us 1 1 100.00
ac_range_check_same_csr_outstanding 12.000s 294.305us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 10.000s 155.890us 1 1 100.00
ac_range_check_csr_rw 10.000s 22.210us 1 1 100.00
ac_range_check_csr_aliasing 30.000s 15976.351us 1 1 100.00
ac_range_check_same_csr_outstanding 12.000s 294.305us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 24.000s 2057.674us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 24.000s 2057.674us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 24.000s 2057.674us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 24.000s 2057.674us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 142.000s 10449.596us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 9.000s 12.249us 1 1 100.00
ac_range_check_tl_intg_err 15.000s 342.745us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 374.000s 14375.855us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 48.000s 4605.878us 1 1 100.00