| V1 |
|
83.33% |
| V2 |
|
100.00% |
| V2S |
|
100.00% |
| V3 |
|
50.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| entropy_src_smoke | 2.000s | 238.961us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| entropy_src_csr_hw_reset | 3.000s | 72.161us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| entropy_src_csr_rw | 1.000s | 23.170us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| entropy_src_csr_bit_bash | 6.000s | 118.795us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| entropy_src_csr_aliasing | 4.000s | 242.100us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 0 | 1 | 0.00 | |||
| entropy_src_csr_mem_rw_with_rand_reset | 2.000s | 11.183us | 0 | 1 | 0.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| entropy_src_csr_rw | 1.000s | 23.170us | 1 | 1 | 100.00 | |
| entropy_src_csr_aliasing | 4.000s | 242.100us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| firmware | 3 | 3 | 100.00 | |||
| entropy_src_smoke | 2.000s | 238.961us | 1 | 1 | 100.00 | |
| entropy_src_rng | 220.000s | 14037.612us | 1 | 1 | 100.00 | |
| entropy_src_fw_ov | 473.000s | 14024.121us | 1 | 1 | 100.00 | |
| firmware_mode | 1 | 1 | 100.00 | |||
| entropy_src_fw_ov | 473.000s | 14024.121us | 1 | 1 | 100.00 | |
| rng_mode | 1 | 1 | 100.00 | |||
| entropy_src_rng | 220.000s | 14037.612us | 1 | 1 | 100.00 | |
| rng_max_rate | 1 | 1 | 100.00 | |||
| entropy_src_rng_max_rate | 599.000s | 13042.007us | 1 | 1 | 100.00 | |
| health_checks | 1 | 1 | 100.00 | |||
| entropy_src_rng | 220.000s | 14037.612us | 1 | 1 | 100.00 | |
| conditioning | 1 | 1 | 100.00 | |||
| entropy_src_rng | 220.000s | 14037.612us | 1 | 1 | 100.00 | |
| interrupts | 2 | 2 | 100.00 | |||
| entropy_src_rng | 220.000s | 14037.612us | 1 | 1 | 100.00 | |
| entropy_src_intr | 40.000s | 1002.512us | 1 | 1 | 100.00 | |
| alerts | 2 | 2 | 100.00 | |||
| entropy_src_rng | 220.000s | 14037.612us | 1 | 1 | 100.00 | |
| entropy_src_functional_alerts | 7.000s | 178.051us | 1 | 1 | 100.00 | |
| stress_all | 1 | 1 | 100.00 | |||
| entropy_src_stress_all | 5.000s | 988.766us | 1 | 1 | 100.00 | |
| functional_errors | 1 | 1 | 100.00 | |||
| entropy_src_functional_errors | 3.000s | 502.762us | 1 | 1 | 100.00 | |
| firmware_ov_read_contiguous_data | 1 | 1 | 100.00 | |||
| entropy_src_fw_ov_contiguous | 2.000s | 25.280us | 1 | 1 | 100.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| entropy_src_intr_test | 2.000s | 46.963us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| entropy_src_alert_test | 2.000s | 65.607us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| entropy_src_tl_errors | 5.000s | 54.611us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| entropy_src_tl_errors | 5.000s | 54.611us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| entropy_src_csr_hw_reset | 3.000s | 72.161us | 1 | 1 | 100.00 | |
| entropy_src_csr_rw | 1.000s | 23.170us | 1 | 1 | 100.00 | |
| entropy_src_csr_aliasing | 4.000s | 242.100us | 1 | 1 | 100.00 | |
| entropy_src_same_csr_outstanding | 2.000s | 20.575us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| entropy_src_csr_hw_reset | 3.000s | 72.161us | 1 | 1 | 100.00 | |
| entropy_src_csr_rw | 1.000s | 23.170us | 1 | 1 | 100.00 | |
| entropy_src_csr_aliasing | 4.000s | 242.100us | 1 | 1 | 100.00 | |
| entropy_src_same_csr_outstanding | 2.000s | 20.575us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| tl_intg_err | 2 | 2 | 100.00 | |||
| entropy_src_sec_cm | 2.000s | 181.825us | 1 | 1 | 100.00 | |
| entropy_src_tl_intg_err | 3.000s | 325.792us | 1 | 1 | 100.00 | |
| sec_cm_config_regwen | 2 | 2 | 100.00 | |||
| entropy_src_rng | 220.000s | 14037.612us | 1 | 1 | 100.00 | |
| entropy_src_cfg_regwen | 2.000s | 39.682us | 1 | 1 | 100.00 | |
| sec_cm_config_mubi | 1 | 1 | 100.00 | |||
| entropy_src_rng | 220.000s | 14037.612us | 1 | 1 | 100.00 | |
| sec_cm_config_redun | 1 | 1 | 100.00 | |||
| entropy_src_rng | 220.000s | 14037.612us | 1 | 1 | 100.00 | |
| sec_cm_intersig_mubi | 2 | 2 | 100.00 | |||
| entropy_src_rng | 220.000s | 14037.612us | 1 | 1 | 100.00 | |
| entropy_src_fw_ov | 473.000s | 14024.121us | 1 | 1 | 100.00 | |
| sec_cm_main_sm_fsm_sparse | 2 | 2 | 100.00 | |||
| entropy_src_functional_errors | 3.000s | 502.762us | 1 | 1 | 100.00 | |
| entropy_src_sec_cm | 2.000s | 181.825us | 1 | 1 | 100.00 | |
| sec_cm_ack_sm_fsm_sparse | 2 | 2 | 100.00 | |||
| entropy_src_functional_errors | 3.000s | 502.762us | 1 | 1 | 100.00 | |
| entropy_src_sec_cm | 2.000s | 181.825us | 1 | 1 | 100.00 | |
| sec_cm_rng_bkgn_chk | 1 | 1 | 100.00 | |||
| entropy_src_rng | 220.000s | 14037.612us | 1 | 1 | 100.00 | |
| sec_cm_fifo_ctr_redun | 2 | 2 | 100.00 | |||
| entropy_src_functional_errors | 3.000s | 502.762us | 1 | 1 | 100.00 | |
| entropy_src_sec_cm | 2.000s | 181.825us | 1 | 1 | 100.00 | |
| sec_cm_ctr_redun | 2 | 2 | 100.00 | |||
| entropy_src_functional_errors | 3.000s | 502.762us | 1 | 1 | 100.00 | |
| entropy_src_sec_cm | 2.000s | 181.825us | 1 | 1 | 100.00 | |
| sec_cm_ctr_local_esc | 1 | 1 | 100.00 | |||
| entropy_src_functional_errors | 3.000s | 502.762us | 1 | 1 | 100.00 | |
| sec_cm_esfinal_rdata_bus_consistency | 1 | 1 | 100.00 | |||
| entropy_src_functional_alerts | 7.000s | 178.051us | 1 | 1 | 100.00 | |
| sec_cm_tile_link_bus_integrity | 1 | 1 | 100.00 | |||
| entropy_src_tl_intg_err | 3.000s | 325.792us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| external_health_tests | 1 | 1 | 100.00 | |||
| entropy_src_rng_with_xht_rsps | 137.000s | 14052.996us | 1 | 1 | 100.00 | |
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| entropy_src_stress_all_with_rand_reset | 19.000s | 1569.857us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_WARNING (uvm_reg_field.svh:1186) [RegModel] Trying to predict value of field 'observe_fifo_depth' while register 'entropy_src_reg_block.observe_fifo_depth' is being accessed | 1 test run | |||
| entropy_src_stress_all_with_rand_reset | 59065018339564906621551398641681086540457694290178157965749953276853959962607 | 125 |
UVM_FATAL @ 1569857323 ps: (entropy_src_scoreboard.sv:1599) [uvm_test_top.env.scoreboard] Check failed (ral.observe_fifo_depth.observe_fifo_depth.predict( ral.observe_fifo_depth.observe_fifo_depth.get_mirrored_value()-1, .kind(UVM_PREDICT_DIRECT)))
UVM_INFO @ 1569857323 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror adaptp_lo_total_fails | 1 test run | |||
| entropy_src_csr_mem_rw_with_rand_reset | 67409254097672635803273561963551695940977396749803319585386116223987277306610 | 113 |
UVM_INFO @ 11183050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|