| V1 |
|
100.00% |
| V2 |
|
100.00% |
| V2S |
|
100.00% |
| V3 |
|
50.00% |
| unmapped |
|
100.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 4 | 4 | 100.00 | |||
| gpio_smoke | 1.750s | 176.771us | 1 | 1 | 100.00 | |
| gpio_smoke_no_pullup_pulldown | 2.050s | 102.403us | 1 | 1 | 100.00 | |
| gpio_smoke_en_cdc_prim | 1.440s | 58.664us | 1 | 1 | 100.00 | |
| gpio_smoke_no_pullup_pulldown_en_cdc_prim | 1.540s | 72.243us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| gpio_csr_hw_reset | 1.020s | 40.879us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| gpio_csr_rw | 0.930s | 13.907us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| gpio_csr_bit_bash | 4.300s | 378.920us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| gpio_csr_aliasing | 3.050s | 174.085us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| gpio_csr_mem_rw_with_rand_reset | 1.290s | 82.699us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| gpio_csr_rw | 0.930s | 13.907us | 1 | 1 | 100.00 | |
| gpio_csr_aliasing | 3.050s | 174.085us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| direct_and_masked_out | 2 | 2 | 100.00 | |||
| gpio_random_dout_din | 1.280s | 72.819us | 1 | 1 | 100.00 | |
| gpio_random_dout_din_no_pullup_pulldown | 1.230s | 70.841us | 1 | 1 | 100.00 | |
| out_in_regs_read_write | 1 | 1 | 100.00 | |||
| gpio_dout_din_regs_random_rw | 1.200s | 97.606us | 1 | 1 | 100.00 | |
| gpio_interrupt_programming | 1 | 1 | 100.00 | |||
| gpio_intr_rand_pgm | 1.250s | 155.918us | 1 | 1 | 100.00 | |
| random_interrupt_trigger | 1 | 1 | 100.00 | |||
| gpio_rand_intr_trigger | 1.950s | 836.194us | 1 | 1 | 100.00 | |
| interrupt_and_noise_filter | 1 | 1 | 100.00 | |||
| gpio_intr_with_filter_rand_intr_event | 2.750s | 172.229us | 1 | 1 | 100.00 | |
| noise_filter_stress | 1 | 1 | 100.00 | |||
| gpio_filter_stress | 17.850s | 674.178us | 1 | 1 | 100.00 | |
| regs_long_reads_and_writes | 1 | 1 | 100.00 | |||
| gpio_random_long_reg_writes_reg_reads | 1.920s | 272.528us | 1 | 1 | 100.00 | |
| full_random | 1 | 1 | 100.00 | |||
| gpio_full_random | 1.050s | 192.374us | 1 | 1 | 100.00 | |
| stress_all | 1 | 1 | 100.00 | |||
| gpio_stress_all | 46.480s | 49784.911us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| gpio_alert_test | 0.890s | 79.256us | 1 | 1 | 100.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| gpio_intr_test | 0.850s | 39.815us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| gpio_tl_errors | 1.730s | 276.972us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| gpio_tl_errors | 1.730s | 276.972us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| gpio_csr_rw | 0.930s | 13.907us | 1 | 1 | 100.00 | |
| gpio_same_csr_outstanding | 1.860s | 362.547us | 1 | 1 | 100.00 | |
| gpio_csr_aliasing | 3.050s | 174.085us | 1 | 1 | 100.00 | |
| gpio_csr_hw_reset | 1.020s | 40.879us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| gpio_csr_rw | 0.930s | 13.907us | 1 | 1 | 100.00 | |
| gpio_same_csr_outstanding | 1.860s | 362.547us | 1 | 1 | 100.00 | |
| gpio_csr_aliasing | 3.050s | 174.085us | 1 | 1 | 100.00 | |
| gpio_csr_hw_reset | 1.020s | 40.879us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| tl_intg_err | 2 | 2 | 100.00 | |||
| gpio_tl_intg_err | 2.210s | 294.728us | 1 | 1 | 100.00 | |
| gpio_sec_cm | 1.170s | 77.602us | 1 | 1 | 100.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| gpio_tl_intg_err | 2.210s | 294.728us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| straps_data | 1 | 1 | 100.00 | |||
| gpio_rand_straps | 0.870s | 13.265us | 1 | 1 | 100.00 | |
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| gpio_stress_all_with_rand_reset | 4.630s | 831.495us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| Unmapped | 1 | 1 | 100.00 | |||
| gpio_inp_prd_cnt | 0.900s | 15.467us | 1 | 1 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (cip_base_vseq.sv:1230) [gpio_common_vseq] Check failed (vseq_done) | 1 test run | |||
| gpio_stress_all_with_rand_reset | 97137131859533235910294875989223243406691290617231670606565759799326627035951 | 87 |
UVM_INFO @ 831494974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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