Simulation Results

Simulation Results: keymgr_dpe/darjeeling

19/08/2026 21:14:37 DVSim: v1.50.1 sha: e688e72 json Branch: master Tool: xcelium [unknown]

Coverage statistics

Total
65.54 %

code
82.39 %

assert
97.19 %

func
17.04 %

block
97.91 %

line
98.66 %

branch
93.22 %

toggle
56.15 %

FSM
81.54 %

Validation stages

V1		100.00%
V2		100.00%
V2S		100.00%

V1

6/6 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	keymgr_dpe_smoke	20.000s	4253.613us	1	1	100.00
csr_hw_reset				1	1	100.00
	keymgr_dpe_csr_hw_reset	1.000s	37.591us	1	1	100.00
csr_rw				1	1	100.00
	keymgr_dpe_csr_rw	2.000s	75.959us	1	1	100.00
csr_bit_bash				1	1	100.00
	keymgr_dpe_csr_bit_bash	12.000s	1051.005us	1	1	100.00
csr_aliasing				1	1	100.00
	keymgr_dpe_csr_aliasing	4.000s	85.844us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	keymgr_dpe_csr_mem_rw_with_rand_reset	2.000s	44.619us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	keymgr_dpe_csr_rw	2.000s	75.959us	1	1	100.00
	keymgr_dpe_csr_aliasing	4.000s	85.844us	1	1	100.00

V2

7/7 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
intr_test				1	1	100.00
	keymgr_dpe_intr_test	1.000s	39.741us	1	1	100.00
alert_test				1	1	100.00
	keymgr_dpe_alert_test	2.000s	15.985us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	keymgr_dpe_tl_errors	3.000s	651.836us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	keymgr_dpe_tl_errors	3.000s	651.836us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	keymgr_dpe_csr_hw_reset	1.000s	37.591us	1	1	100.00
	keymgr_dpe_csr_rw	2.000s	75.959us	1	1	100.00
	keymgr_dpe_csr_aliasing	4.000s	85.844us	1	1	100.00
	keymgr_dpe_same_csr_outstanding	2.000s	121.823us	1	1	100.00
tl_d_partial_access				4	4	100.00
	keymgr_dpe_csr_hw_reset	1.000s	37.591us	1	1	100.00
	keymgr_dpe_csr_rw	2.000s	75.959us	1	1	100.00
	keymgr_dpe_csr_aliasing	4.000s	85.844us	1	1	100.00
	keymgr_dpe_same_csr_outstanding	2.000s	121.823us	1	1	100.00

V2S

4/4 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	keymgr_dpe_sec_cm	5.000s	853.673us	1	1	100.00
	keymgr_dpe_tl_intg_err	4.000s	717.792us	1	1	100.00
shadow_reg_update_error				1	1	100.00
	keymgr_dpe_shadow_reg_errors	3.000s	82.339us	1	1	100.00
shadow_reg_read_clear_staged_value				1	1	100.00
	keymgr_dpe_shadow_reg_errors	3.000s	82.339us	1	1	100.00
shadow_reg_storage_error				1	1	100.00
	keymgr_dpe_shadow_reg_errors	3.000s	82.339us	1	1	100.00
shadowed_reset_glitch				1	1	100.00
	keymgr_dpe_shadow_reg_errors	3.000s	82.339us	1	1	100.00
shadow_reg_update_error_with_csr_rw				1	1	100.00
	keymgr_dpe_shadow_reg_errors_with_csr_rw	4.000s	135.480us	1	1	100.00
prim_count_check				1	1	100.00
	keymgr_dpe_sec_cm	5.000s	853.673us	1	1	100.00
prim_fsm_check				1	1	100.00
	keymgr_dpe_sec_cm	5.000s	853.673us	1	1	100.00