| V1 |
|
100.00% |
| V2 |
|
92.86% |
| V2S |
|
92.00% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 2 | 2 | 100.00 | |||
| otbn_smoke | 12.000s | 151.814us | 1 | 1 | 100.00 | |
| otbn_smoke_vectorized | 10.000s | 28.019us | 1 | 1 | 100.00 | |
| single_binary | 1 | 1 | 100.00 | |||
| otbn_single | 16.000s | 76.530us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| otbn_csr_hw_reset | 4.000s | 81.652us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| otbn_csr_rw | 4.000s | 23.455us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| otbn_csr_bit_bash | 8.000s | 381.026us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| otbn_csr_aliasing | 4.000s | 14.973us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| otbn_csr_mem_rw_with_rand_reset | 6.000s | 35.440us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| otbn_csr_rw | 4.000s | 23.455us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 4.000s | 14.973us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| otbn_mem_walk | 197.000s | 25789.227us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| otbn_mem_partial_access | 20.000s | 173.552us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reset_recovery | 1 | 1 | 100.00 | |||
| otbn_reset | 52.000s | 115.904us | 1 | 1 | 100.00 | |
| multi_error | 1 | 1 | 100.00 | |||
| otbn_multi_err | 79.000s | 657.543us | 1 | 1 | 100.00 | |
| back_to_back | 1 | 1 | 100.00 | |||
| otbn_multi | 32.000s | 222.897us | 1 | 1 | 100.00 | |
| stress_all | 1 | 1 | 100.00 | |||
| otbn_stress_all | 156.000s | 352.893us | 1 | 1 | 100.00 | |
| lc_escalation | 0 | 1 | 0.00 | |||
| otbn_escalate | 4.000s | 1.510us | 0 | 1 | 0.00 | |
| zero_state_err_urnd | 1 | 1 | 100.00 | |||
| otbn_zero_state_err_urnd | 9.000s | 49.909us | 1 | 1 | 100.00 | |
| sw_errs_fatal_chk | 1 | 1 | 100.00 | |||
| otbn_sw_errs_fatal_chk | 9.000s | 212.332us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| otbn_alert_test | 5.000s | 14.785us | 1 | 1 | 100.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| otbn_intr_test | 4.000s | 11.821us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| otbn_tl_errors | 7.000s | 316.574us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| otbn_tl_errors | 7.000s | 316.574us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| otbn_csr_hw_reset | 4.000s | 81.652us | 1 | 1 | 100.00 | |
| otbn_csr_rw | 4.000s | 23.455us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 4.000s | 14.973us | 1 | 1 | 100.00 | |
| otbn_same_csr_outstanding | 6.000s | 16.729us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| otbn_csr_hw_reset | 4.000s | 81.652us | 1 | 1 | 100.00 | |
| otbn_csr_rw | 4.000s | 23.455us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 4.000s | 14.973us | 1 | 1 | 100.00 | |
| otbn_same_csr_outstanding | 6.000s | 16.729us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| mem_integrity | 2 | 2 | 100.00 | |||
| otbn_imem_err | 12.000s | 15.968us | 1 | 1 | 100.00 | |
| otbn_dmem_err | 10.000s | 14.447us | 1 | 1 | 100.00 | |
| internal_integrity | 3 | 4 | 75.00 | |||
| otbn_alu_bignum_mod_err | 10.000s | 53.325us | 1 | 1 | 100.00 | |
| otbn_controller_ispr_rdata_err | 15.000s | 47.168us | 1 | 1 | 100.00 | |
| otbn_mac_bignum_acc_err | 11.000s | 25.275us | 1 | 1 | 100.00 | |
| otbn_urnd_err | 9.000s | 9.584us | 0 | 1 | 0.00 | |
| illegal_bus_access | 1 | 1 | 100.00 | |||
| otbn_illegal_mem_acc | 7.000s | 29.704us | 1 | 1 | 100.00 | |
| otbn_mem_gnt_acc_err | 1 | 1 | 100.00 | |||
| otbn_mem_gnt_acc_err | 9.000s | 21.004us | 1 | 1 | 100.00 | |
| otbn_non_sec_partial_wipe | 1 | 1 | 100.00 | |||
| otbn_partial_wipe | 7.000s | 48.480us | 1 | 1 | 100.00 | |
| tl_intg_err | 2 | 2 | 100.00 | |||
| otbn_sec_cm | 232.000s | 6412.742us | 1 | 1 | 100.00 | |
| otbn_tl_intg_err | 32.000s | 141.664us | 1 | 1 | 100.00 | |
| passthru_mem_tl_intg_err | 1 | 1 | 100.00 | |||
| otbn_passthru_mem_tl_intg_err | 82.000s | 255.189us | 1 | 1 | 100.00 | |
| prim_fsm_check | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 232.000s | 6412.742us | 1 | 1 | 100.00 | |
| prim_count_check | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 232.000s | 6412.742us | 1 | 1 | 100.00 | |
| sec_cm_mem_scramble | 1 | 1 | 100.00 | |||
| otbn_smoke | 12.000s | 151.814us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_integrity | 1 | 1 | 100.00 | |||
| otbn_dmem_err | 10.000s | 14.447us | 1 | 1 | 100.00 | |
| sec_cm_instruction_mem_integrity | 1 | 1 | 100.00 | |||
| otbn_imem_err | 12.000s | 15.968us | 1 | 1 | 100.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| otbn_tl_intg_err | 32.000s | 141.664us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_global_esc | 0 | 1 | 0.00 | |||
| otbn_escalate | 4.000s | 1.510us | 0 | 1 | 0.00 | |
| sec_cm_controller_fsm_local_esc | 5 | 5 | 100.00 | |||
| otbn_imem_err | 12.000s | 15.968us | 1 | 1 | 100.00 | |
| otbn_dmem_err | 10.000s | 14.447us | 1 | 1 | 100.00 | |
| otbn_zero_state_err_urnd | 9.000s | 49.909us | 1 | 1 | 100.00 | |
| otbn_illegal_mem_acc | 7.000s | 29.704us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 232.000s | 6412.742us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 232.000s | 6412.742us | 1 | 1 | 100.00 | |
| sec_cm_scramble_key_sideload | 1 | 1 | 100.00 | |||
| otbn_single | 16.000s | 76.530us | 1 | 1 | 100.00 | |
| sec_cm_scramble_ctrl_fsm_local_esc | 5 | 5 | 100.00 | |||
| otbn_imem_err | 12.000s | 15.968us | 1 | 1 | 100.00 | |
| otbn_dmem_err | 10.000s | 14.447us | 1 | 1 | 100.00 | |
| otbn_zero_state_err_urnd | 9.000s | 49.909us | 1 | 1 | 100.00 | |
| otbn_illegal_mem_acc | 7.000s | 29.704us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 232.000s | 6412.742us | 1 | 1 | 100.00 | |
| sec_cm_scramble_ctrl_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 232.000s | 6412.742us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_global_esc | 0 | 1 | 0.00 | |||
| otbn_escalate | 4.000s | 1.510us | 0 | 1 | 0.00 | |
| sec_cm_start_stop_ctrl_fsm_local_esc | 5 | 5 | 100.00 | |||
| otbn_imem_err | 12.000s | 15.968us | 1 | 1 | 100.00 | |
| otbn_dmem_err | 10.000s | 14.447us | 1 | 1 | 100.00 | |
| otbn_zero_state_err_urnd | 9.000s | 49.909us | 1 | 1 | 100.00 | |
| otbn_illegal_mem_acc | 7.000s | 29.704us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 232.000s | 6412.742us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 232.000s | 6412.742us | 1 | 1 | 100.00 | |
| sec_cm_data_reg_sw_sca | 1 | 1 | 100.00 | |||
| otbn_single | 16.000s | 76.530us | 1 | 1 | 100.00 | |
| sec_cm_ctrl_redun | 1 | 1 | 100.00 | |||
| otbn_ctrl_redun | 10.000s | 33.781us | 1 | 1 | 100.00 | |
| sec_cm_pc_ctrl_flow_redun | 1 | 1 | 100.00 | |||
| otbn_pc_ctrl_flow_redun | 10.000s | 160.318us | 1 | 1 | 100.00 | |
| sec_cm_rnd_bus_consistency | 1 | 1 | 100.00 | |||
| otbn_rnd_sec_cm | 69.000s | 112.899us | 1 | 1 | 100.00 | |
| sec_cm_rnd_rng_digest | 1 | 1 | 100.00 | |||
| otbn_rnd_sec_cm | 69.000s | 112.899us | 1 | 1 | 100.00 | |
| sec_cm_rf_base_data_reg_sw_integrity | 1 | 1 | 100.00 | |||
| otbn_rf_base_intg_err | 16.000s | 35.266us | 1 | 1 | 100.00 | |
| sec_cm_rf_base_data_reg_sw_glitch_detect | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 232.000s | 6412.742us | 1 | 1 | 100.00 | |
| sec_cm_stack_wr_ptr_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 232.000s | 6412.742us | 1 | 1 | 100.00 | |
| sec_cm_rf_bignum_data_reg_sw_integrity | 1 | 1 | 100.00 | |||
| otbn_rf_bignum_intg_err | 11.000s | 1035.219us | 1 | 1 | 100.00 | |
| sec_cm_rf_bignum_data_reg_sw_glitch_detect | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 232.000s | 6412.742us | 1 | 1 | 100.00 | |
| sec_cm_loop_stack_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 232.000s | 6412.742us | 1 | 1 | 100.00 | |
| sec_cm_loop_stack_addr_integrity | 1 | 1 | 100.00 | |||
| otbn_stack_addr_integ_chk | 11.000s | 21.717us | 1 | 1 | 100.00 | |
| sec_cm_call_stack_addr_integrity | 1 | 1 | 100.00 | |||
| otbn_stack_addr_integ_chk | 11.000s | 21.717us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_state_consistency | 1 | 1 | 100.00 | |||
| otbn_sec_wipe_err | 8.000s | 14.074us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_sec_wipe | 1 | 1 | 100.00 | |||
| otbn_single | 16.000s | 76.530us | 1 | 1 | 100.00 | |
| sec_cm_instruction_mem_sec_wipe | 1 | 1 | 100.00 | |||
| otbn_single | 16.000s | 76.530us | 1 | 1 | 100.00 | |
| sec_cm_data_reg_sw_sec_wipe | 1 | 1 | 100.00 | |||
| otbn_single | 16.000s | 76.530us | 1 | 1 | 100.00 | |
| sec_cm_write_mem_integrity | 1 | 1 | 100.00 | |||
| otbn_multi | 32.000s | 222.897us | 1 | 1 | 100.00 | |
| sec_cm_ctrl_flow_count | 1 | 1 | 100.00 | |||
| otbn_single | 16.000s | 76.530us | 1 | 1 | 100.00 | |
| sec_cm_ctrl_flow_sca | 1 | 1 | 100.00 | |||
| otbn_single | 16.000s | 76.530us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_sw_noaccess | 1 | 1 | 100.00 | |||
| otbn_sw_no_acc | 16.000s | 375.401us | 1 | 1 | 100.00 | |
| sec_cm_key_sideload | 1 | 1 | 100.00 | |||
| otbn_single | 16.000s | 76.530us | 1 | 1 | 100.00 | |
| sec_cm_tlul_fifo_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 232.000s | 6412.742us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| otbn_stress_all_with_rand_reset | 209.000s | 799.400us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (otbn_scoreboard.sv:322) [scoreboard] Check failed item.d_data == exp_read_data.val (* [*] vs * [*]) value for register otbn_reg_block.status | 1 test run | |||
| otbn_escalate | 88362289000682648717566511059140107818871747360959669799142310537861388945063 | 112 |
UVM_INFO @ 1510390 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (otbn_base_vseq.sv:349) [otbn_imem_err_vseq] Check failed (!cfg.under_reset) | 1 test run | |||
| otbn_stress_all_with_rand_reset | 64951519050659580732131008768851474200053138657433961706306431858071889172169 | 182 |
UVM_INFO @ 799399990 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_sva_*/otbn_idle_checker.sv,196): Assertion NotRunningWhenLocked_A has failed | 1 test run | |||
| otbn_urnd_err | 115727340676759962058239175844652097715134068228197388122341939843689806936835 | 116 |
UVM_ERROR @ 9584383 ps: (otbn_idle_checker.sv:196) [ASSERT FAILED] NotRunningWhenLocked_A
UVM_INFO @ 9584383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|