Simulation Results: gpio

 
24/08/2026 21:37:39 DVSim: v1.51.2 sha: 4243cf5 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 90.25 %
  • code
  • 72.04 %
  • assert
  • 98.73 %
  • func
  • 99.99 %
  • line
  • 92.70 %
  • branch
  • 88.93 %
  • cond
  • 90.29 %
  • toggle
  • 78.89 %
  • FSM
  • 9.38 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.990s 85.612us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.770s 55.831us 1 1 100.00
gpio_smoke_en_cdc_prim 1.530s 137.925us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.680s 258.367us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.990s 26.343us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 1.050s 15.620us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 3.370s 214.370us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 2.240s 101.798us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 0.960s 22.205us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 1.050s 15.620us 1 1 100.00
gpio_csr_aliasing 2.240s 101.798us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.190s 99.079us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.180s 34.030us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 1.190s 124.145us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.060s 133.442us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 3.020s 714.633us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 2.740s 816.236us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 27.940s 5797.046us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 2.240s 46.276us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 0.960s 28.389us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 12.840s 1795.452us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.910s 13.145us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.920s 30.321us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 2.550s 213.290us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 2.550s 213.290us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 1.050s 15.620us 1 1 100.00
gpio_same_csr_outstanding 1.290s 59.542us 1 1 100.00
gpio_csr_aliasing 2.240s 101.798us 1 1 100.00
gpio_csr_hw_reset 0.990s 26.343us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 1.050s 15.620us 1 1 100.00
gpio_same_csr_outstanding 1.290s 59.542us 1 1 100.00
gpio_csr_aliasing 2.240s 101.798us 1 1 100.00
gpio_csr_hw_reset 0.990s 26.343us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.360s 50.293us 1 1 100.00
gpio_sec_cm 1.200s 266.058us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.360s 50.293us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.890s 41.712us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 2.730s 100.556us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
gpio_inp_prd_cnt 0.890s 43.606us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:243) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 44182890344041717179151098063441821534516126883868020690236151283973666706844 288
UVM_INFO @ 1795451643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1230) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 61035760870897339760222863121936718072609492378599837138624575973712024870397 86
UVM_INFO @ 100555870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---