Simulation Results: entropy_src/rng_16bits

 
26/08/2026 21:26:37 DVSim: v1.52.0 sha: af31ff0 json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 69.73 %
  • code
  • 82.51 %
  • assert
  • 74.20 %
  • func
  • 52.49 %
  • block
  • 94.03 %
  • line
  • 97.65 %
  • branch
  • 86.04 %
  • toggle
  • 52.60 %
  • FSM
  • 93.75 %
Validation stages
V1
83.33%
V2
93.75%
V2S
85.71%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 3.000s 112.218us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 3.000s 52.677us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 3.000s 52.794us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 16.000s 491.510us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 4.000s 140.042us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 3.000s 12.450us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 3.000s 52.794us 1 1 100.00
entropy_src_csr_aliasing 4.000s 140.042us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 2 3 66.67
entropy_src_smoke 3.000s 112.218us 1 1 100.00
entropy_src_rng 75.000s 2078.613us 0 1 0.00
entropy_src_fw_ov 132.000s 13279.764us 1 1 100.00
firmware_mode 1 1 100.00
entropy_src_fw_ov 132.000s 13279.764us 1 1 100.00
rng_mode 0 1 0.00
entropy_src_rng 75.000s 2078.613us 0 1 0.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 623.000s 14019.409us 1 1 100.00
health_checks 0 1 0.00
entropy_src_rng 75.000s 2078.613us 0 1 0.00
conditioning 0 1 0.00
entropy_src_rng 75.000s 2078.613us 0 1 0.00
interrupts 1 2 50.00
entropy_src_rng 75.000s 2078.613us 0 1 0.00
entropy_src_intr 3.000s 136.754us 1 1 100.00
alerts 1 2 50.00
entropy_src_rng 75.000s 2078.613us 0 1 0.00
entropy_src_functional_alerts 7.000s 652.120us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 3.000s 164.132us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 4.000s 106.239us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 4.000s 101.963us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 3.000s 173.163us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 3.000s 54.999us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 4.000s 397.042us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 4.000s 397.042us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 3.000s 52.677us 1 1 100.00
entropy_src_csr_rw 3.000s 52.794us 1 1 100.00
entropy_src_csr_aliasing 4.000s 140.042us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 24.698us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 3.000s 52.677us 1 1 100.00
entropy_src_csr_rw 3.000s 52.794us 1 1 100.00
entropy_src_csr_aliasing 4.000s 140.042us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 24.698us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 4.000s 315.521us 1 1 100.00
entropy_src_tl_intg_err 4.000s 64.405us 1 1 100.00
sec_cm_config_regwen 1 2 50.00
entropy_src_rng 75.000s 2078.613us 0 1 0.00
entropy_src_cfg_regwen 2.000s 39.342us 1 1 100.00
sec_cm_config_mubi 0 1 0.00
entropy_src_rng 75.000s 2078.613us 0 1 0.00
sec_cm_config_redun 0 1 0.00
entropy_src_rng 75.000s 2078.613us 0 1 0.00
sec_cm_intersig_mubi 1 2 50.00
entropy_src_rng 75.000s 2078.613us 0 1 0.00
entropy_src_fw_ov 132.000s 13279.764us 1 1 100.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 4.000s 106.239us 1 1 100.00
entropy_src_sec_cm 4.000s 315.521us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 4.000s 106.239us 1 1 100.00
entropy_src_sec_cm 4.000s 315.521us 1 1 100.00
sec_cm_rng_bkgn_chk 0 1 0.00
entropy_src_rng 75.000s 2078.613us 0 1 0.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 4.000s 106.239us 1 1 100.00
entropy_src_sec_cm 4.000s 315.521us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 4.000s 106.239us 1 1 100.00
entropy_src_sec_cm 4.000s 315.521us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 4.000s 106.239us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 7.000s 652.120us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 4.000s 64.405us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 226.000s 14075.645us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
entropy_src_stress_all_with_rand_reset 25.000s 528.249us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (entropy_src_scoreboard.sv:2128) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: entropy_src_reg_block.ht_watermark 1 test run
entropy_src_rng 105333237552973956734314748785797821535938469629858169033370756841531157064981 805
UVM_INFO @ 2078613012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (entropy_src_scoreboard.sv:1661) scoreboard [scoreboard] invalid csr: entropy_src_reg_block.extht_lo_threshold 1 test run
entropy_src_stress_all_with_rand_reset 111476091457718151665534823445157074709431545361172058466425481050689298817890 833
UVM_INFO @ 528248858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror adaptp_hi_total_fails 1 test run
entropy_src_csr_mem_rw_with_rand_reset 17571330752305700368259094361488685111505916599350573946376599080902084047794 113
UVM_INFO @ 12450286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---