Simulation Results: aes/gcm_masked

 
27/08/2026 21:36:35 DVSim: v1.52.0 sha: 72ff50e json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 87.89 %
  • code
  • 95.66 %
  • assert
  • 98.29 %
  • func
  • 69.72 %
  • block
  • 96.29 %
  • line
  • 97.41 %
  • branch
  • 91.07 %
  • toggle
  • 98.05 %
  • FSM
  • 96.13 %
Validation stages
V1
100.00%
V2
100.00%
V2S
88.89%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 3.000s 93.494us 1 1 100.00
smoke 1 1 100.00
aes_smoke 3.000s 126.081us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 62.355us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 2.000s 60.989us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 8.000s 4567.312us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 2.000s 158.604us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 87.108us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 2.000s 60.989us 1 1 100.00
aes_csr_aliasing 2.000s 158.604us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 3.000s 126.081us 1 1 100.00
aes_config_error 5.000s 106.996us 1 1 100.00
aes_stress 4.000s 233.243us 1 1 100.00
key_length 3 3 100.00
aes_smoke 3.000s 126.081us 1 1 100.00
aes_config_error 5.000s 106.996us 1 1 100.00
aes_stress 4.000s 233.243us 1 1 100.00
back2back 2 2 100.00
aes_stress 4.000s 233.243us 1 1 100.00
aes_b2b 5.000s 116.685us 1 1 100.00
backpressure 1 1 100.00
aes_stress 4.000s 233.243us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 3.000s 126.081us 1 1 100.00
aes_config_error 5.000s 106.996us 1 1 100.00
aes_stress 4.000s 233.243us 1 1 100.00
aes_alert_reset 5.000s 179.234us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 105.328us 1 1 100.00
aes_config_error 5.000s 106.996us 1 1 100.00
aes_alert_reset 5.000s 179.234us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 4.000s 205.135us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 12.000s 4592.958us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 13.000s 245.499us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 5.000s 179.234us 1 1 100.00
stress 1 1 100.00
aes_stress 4.000s 233.243us 1 1 100.00
sideload 2 2 100.00
aes_stress 4.000s 233.243us 1 1 100.00
aes_sideload 4.000s 762.198us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 4.000s 201.265us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 17.000s 376.212us 1 1 100.00
gcm_save_and_restore 1 1 100.00
aes_gcm_save_restore 4.000s 149.992us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 3.000s 131.559us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 3.000s 114.028us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 3.000s 114.028us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 62.355us 1 1 100.00
aes_csr_rw 2.000s 60.989us 1 1 100.00
aes_csr_aliasing 2.000s 158.604us 1 1 100.00
aes_same_csr_outstanding 2.000s 505.884us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 62.355us 1 1 100.00
aes_csr_rw 2.000s 60.989us 1 1 100.00
aes_csr_aliasing 2.000s 158.604us 1 1 100.00
aes_same_csr_outstanding 2.000s 505.884us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 9.000s 126.921us 1 1 100.00
fault_inject 1 3 33.33
aes_fi 6.000s 349.279us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_cipher_fi 3.000s 87.256us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 131.704us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 131.704us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 131.704us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 131.704us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 4.000s 207.295us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 43.000s 6849.660us 1 1 100.00
aes_tl_intg_err 3.000s 1339.791us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 3.000s 1339.791us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 5.000s 179.234us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 131.704us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 131.704us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 3.000s 126.081us 1 1 100.00
aes_stress 4.000s 233.243us 1 1 100.00
aes_alert_reset 5.000s 179.234us 1 1 100.00
aes_core_fi 3.000s 168.790us 1 1 100.00
sec_cm_gcm_config_sparse 4 4 100.00
aes_gcm_save_restore 4.000s 149.992us 1 1 100.00
aes_config_error 5.000s 106.996us 1 1 100.00
aes_stress 4.000s 233.243us 1 1 100.00
aes_core_fi 3.000s 168.790us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 131.704us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 3.000s 70.168us 1 1 100.00
aes_stress 4.000s 233.243us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 4.000s 233.243us 1 1 100.00
aes_sideload 4.000s 762.198us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 3.000s 70.168us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 3.000s 70.168us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 3.000s 70.168us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 3.000s 70.168us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 3.000s 70.168us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 4.000s 233.243us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 4.000s 233.243us 1 1 100.00
sec_cm_main_fsm_sparse 0 1 0.00
aes_fi 6.000s 349.279us 0 1 0.00
sec_cm_main_fsm_redun 2 4 50.00
aes_fi 6.000s 349.279us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_cipher_fi 3.000s 87.256us 1 1 100.00
aes_ctr_fi 3.000s 61.462us 1 1 100.00
sec_cm_cipher_fsm_sparse 0 1 0.00
aes_fi 6.000s 349.279us 0 1 0.00
sec_cm_cipher_fsm_redun 1 3 33.33
aes_fi 6.000s 349.279us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_cipher_fi 3.000s 87.256us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 3.000s 87.256us 1 1 100.00
sec_cm_ctr_fsm_sparse 0 1 0.00
aes_fi 6.000s 349.279us 0 1 0.00
sec_cm_ctr_fsm_redun 1 3 33.33
aes_fi 6.000s 349.279us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_ctr_fi 3.000s 61.462us 1 1 100.00
sec_cm_ghash_fsm_sparse 0 1 0.00
aes_fi 6.000s 349.279us 0 1 0.00
sec_cm_ctrl_sparse 2 4 50.00
aes_fi 6.000s 349.279us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_cipher_fi 3.000s 87.256us 1 1 100.00
aes_ctr_fi 3.000s 61.462us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 5.000s 179.234us 1 1 100.00
sec_cm_main_fsm_local_esc 2 4 50.00
aes_fi 6.000s 349.279us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_cipher_fi 3.000s 87.256us 1 1 100.00
aes_ctr_fi 3.000s 61.462us 1 1 100.00
sec_cm_cipher_fsm_local_esc 2 4 50.00
aes_fi 6.000s 349.279us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_cipher_fi 3.000s 87.256us 1 1 100.00
aes_ctr_fi 3.000s 61.462us 1 1 100.00
sec_cm_ctr_fsm_local_esc 1 3 33.33
aes_fi 6.000s 349.279us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_ctr_fi 3.000s 61.462us 1 1 100.00
sec_cm_ghash_fsm_local_esc 1 2 50.00
aes_ghash_fi 3.000s 62.255us 1 1 100.00
aes_fi 6.000s 349.279us 0 1 0.00
sec_cm_data_reg_local_esc 1 3 33.33
aes_fi 6.000s 349.279us 0 1 0.00
aes_control_fi 60.000s 0.000us 0 1 0.00
aes_cipher_fi 3.000s 87.256us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 2.000s 59.265us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_scoreboard.sv:782) scoreboard [scoreboard] # * 1 test run
aes_fi 93256671047957507687136277387766641349357110514247224375965160296210719533057 15309
TEST FAILED MESSAGES DID NOT MATCH
0 46 99 00 0
1 00 3d 00 0
Job timed out after * minutes 1 test run
aes_control_fi 80091503096458624902405921338629689636413514757886900142746780230181637502388 None
UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) 1 test run
aes_stress_all_with_rand_reset 73099794096825004630984293191054225479851241591923539764513191112933613678403 112
UVM_INFO @ 59265057 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---