Simulation Results: entropy_src/rng_16bits

 
27/08/2026 21:36:35 DVSim: v1.52.0 sha: 72ff50e json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 66.89 %
  • code
  • 80.89 %
  • assert
  • 74.20 %
  • func
  • 45.58 %
  • block
  • 93.78 %
  • line
  • 97.50 %
  • branch
  • 85.46 %
  • toggle
  • 52.04 %
  • FSM
  • 88.54 %
Validation stages
V1
100.00%
V2
93.75%
V2S
85.71%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 3.000s 49.000us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 31.781us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 3.000s 18.815us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 26.000s 975.761us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 2.000s 38.015us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
entropy_src_csr_mem_rw_with_rand_reset 2.000s 19.774us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 3.000s 18.815us 1 1 100.00
entropy_src_csr_aliasing 2.000s 38.015us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 2 3 66.67
entropy_src_smoke 3.000s 49.000us 1 1 100.00
entropy_src_rng 277.000s 13158.485us 1 1 100.00
entropy_src_fw_ov 3601.000s 0.000us 0 1 0.00
firmware_mode 0 1 0.00
entropy_src_fw_ov 3601.000s 0.000us 0 1 0.00
rng_mode 1 1 100.00
entropy_src_rng 277.000s 13158.485us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 82.000s 14273.543us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 277.000s 13158.485us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 277.000s 13158.485us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 277.000s 13158.485us 1 1 100.00
entropy_src_intr 42.000s 1956.438us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 277.000s 13158.485us 1 1 100.00
entropy_src_functional_alerts 10.000s 330.464us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 161.000s 14737.107us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 3.000s 97.566us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 3.000s 196.755us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 2.000s 26.261us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 3.000s 40.722us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 8.000s 177.029us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 8.000s 177.029us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 31.781us 1 1 100.00
entropy_src_csr_rw 3.000s 18.815us 1 1 100.00
entropy_src_csr_aliasing 2.000s 38.015us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 60.043us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 31.781us 1 1 100.00
entropy_src_csr_rw 3.000s 18.815us 1 1 100.00
entropy_src_csr_aliasing 2.000s 38.015us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 60.043us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 3.000s 54.086us 1 1 100.00
entropy_src_tl_intg_err 4.000s 76.438us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 277.000s 13158.485us 1 1 100.00
entropy_src_cfg_regwen 2.000s 17.156us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 277.000s 13158.485us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 277.000s 13158.485us 1 1 100.00
sec_cm_intersig_mubi 1 2 50.00
entropy_src_rng 277.000s 13158.485us 1 1 100.00
entropy_src_fw_ov 3601.000s 0.000us 0 1 0.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 3.000s 97.566us 1 1 100.00
entropy_src_sec_cm 3.000s 54.086us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 3.000s 97.566us 1 1 100.00
entropy_src_sec_cm 3.000s 54.086us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 277.000s 13158.485us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 3.000s 97.566us 1 1 100.00
entropy_src_sec_cm 3.000s 54.086us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 3.000s 97.566us 1 1 100.00
entropy_src_sec_cm 3.000s 54.086us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 3.000s 97.566us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 10.000s 330.464us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 4.000s 76.438us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 140.000s 14259.423us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
entropy_src_stress_all_with_rand_reset 2.000s 16.211us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (entropy_src_scoreboard.sv:1661) scoreboard [scoreboard] invalid csr: entropy_src_reg_block.extht_hi_threshold 1 test run
entropy_src_stress_all_with_rand_reset 67834362651523651697013301345226561131458065322695124492691900281184601977081 114
UVM_INFO @ 16211259 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes 1 test run
entropy_src_fw_ov 64634292048069750550526909593874479831783342348150803560713029825432490455224 None