Simulation Results: alert_handler

 
31/08/2026 21:27:41 DVSim: v1.52.0 sha: 93d21e7 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 89.45 %
  • code
  • 92.20 %
  • assert
  • 98.20 %
  • func
  • 77.95 %
  • line
  • 99.77 %
  • branch
  • 98.63 %
  • cond
  • 93.02 %
  • toggle
  • 84.09 %
  • FSM
  • 85.48 %
Validation stages
V1
100.00%
V2
84.21%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
alert_handler_smoke 53.780s 3626.385us 1 1 100.00
csr_hw_reset 1 1 100.00
alert_handler_csr_hw_reset 10.240s 492.177us 1 1 100.00
csr_rw 1 1 100.00
alert_handler_csr_rw 4.000s 76.049us 1 1 100.00
csr_bit_bash 1 1 100.00
alert_handler_csr_bit_bash 377.370s 22309.026us 1 1 100.00
csr_aliasing 1 1 100.00
alert_handler_csr_aliasing 29.410s 285.771us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
alert_handler_csr_mem_rw_with_rand_reset 9.980s 749.377us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
alert_handler_csr_rw 4.000s 76.049us 1 1 100.00
alert_handler_csr_aliasing 29.410s 285.771us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
esc_accum 1 1 100.00
alert_handler_esc_alert_accum 93.320s 2829.226us 1 1 100.00
esc_timeout 1 1 100.00
alert_handler_esc_intr_timeout 41.400s 1104.515us 1 1 100.00
entropy 1 1 100.00
alert_handler_entropy 2659.520s 201569.676us 1 1 100.00
sig_int_fail 1 1 100.00
alert_handler_sig_int_fail 19.930s 772.791us 1 1 100.00
clk_skew 1 1 100.00
alert_handler_smoke 53.780s 3626.385us 1 1 100.00
random_alerts 1 1 100.00
alert_handler_random_alerts 58.570s 1342.432us 1 1 100.00
random_classes 1 1 100.00
alert_handler_random_classes 91.020s 9325.777us 1 1 100.00
ping_timeout 0 1 0.00
alert_handler_ping_timeout 5.590s 1046.499us 0 1 0.00
lpg 2 2 100.00
alert_handler_lpg 3035.540s 64960.692us 1 1 100.00
alert_handler_lpg_stub_clk 1348.430s 33693.177us 1 1 100.00
stress_all 0 1 0.00
alert_handler_stress_all 29.510s 1874.692us 0 1 0.00
alert_handler_entropy_stress_test 0 1 0.00
alert_handler_entropy_stress 13.490s 286.671us 0 1 0.00
alert_handler_alert_accum_saturation 1 1 100.00
alert_handler_alert_accum_saturation 4.540s 247.402us 1 1 100.00
intr_test 1 1 100.00
alert_handler_intr_test 2.080s 6.668us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
alert_handler_tl_errors 25.060s 702.915us 1 1 100.00
tl_d_illegal_access 1 1 100.00
alert_handler_tl_errors 25.060s 702.915us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
alert_handler_csr_hw_reset 10.240s 492.177us 1 1 100.00
alert_handler_csr_rw 4.000s 76.049us 1 1 100.00
alert_handler_csr_aliasing 29.410s 285.771us 1 1 100.00
alert_handler_same_csr_outstanding 53.850s 3141.353us 1 1 100.00
tl_d_partial_access 4 4 100.00
alert_handler_csr_hw_reset 10.240s 492.177us 1 1 100.00
alert_handler_csr_rw 4.000s 76.049us 1 1 100.00
alert_handler_csr_aliasing 29.410s 285.771us 1 1 100.00
alert_handler_same_csr_outstanding 53.850s 3141.353us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
alert_handler_shadow_reg_errors 218.450s 9074.025us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
alert_handler_shadow_reg_errors 218.450s 9074.025us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
alert_handler_shadow_reg_errors 218.450s 9074.025us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
alert_handler_shadow_reg_errors 218.450s 9074.025us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
alert_handler_shadow_reg_errors_with_csr_rw 1464.780s 66642.571us 1 1 100.00
tl_intg_err 2 2 100.00
alert_handler_sec_cm 12.550s 1622.848us 1 1 100.00
alert_handler_tl_intg_err 45.910s 454.870us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
alert_handler_tl_intg_err 45.910s 454.870us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
alert_handler_shadow_reg_errors 218.450s 9074.025us 1 1 100.00
sec_cm_ping_timer_config_regwen 1 1 100.00
alert_handler_smoke 53.780s 3626.385us 1 1 100.00
sec_cm_alert_config_regwen 1 1 100.00
alert_handler_smoke 53.780s 3626.385us 1 1 100.00
sec_cm_alert_loc_config_regwen 1 1 100.00
alert_handler_smoke 53.780s 3626.385us 1 1 100.00
sec_cm_class_config_regwen 1 1 100.00
alert_handler_smoke 53.780s 3626.385us 1 1 100.00
sec_cm_alert_intersig_diff 1 1 100.00
alert_handler_sig_int_fail 19.930s 772.791us 1 1 100.00
sec_cm_lpg_intersig_mubi 1 1 100.00
alert_handler_lpg 3035.540s 64960.692us 1 1 100.00
sec_cm_esc_intersig_diff 1 1 100.00
alert_handler_sig_int_fail 19.930s 772.791us 1 1 100.00
sec_cm_alert_rx_intersig_bkgn_chk 1 1 100.00
alert_handler_entropy 2659.520s 201569.676us 1 1 100.00
sec_cm_esc_tx_intersig_bkgn_chk 1 1 100.00
alert_handler_entropy 2659.520s 201569.676us 1 1 100.00
sec_cm_esc_timer_fsm_sparse 1 1 100.00
alert_handler_sec_cm 12.550s 1622.848us 1 1 100.00
sec_cm_ping_timer_fsm_sparse 1 1 100.00
alert_handler_sec_cm 12.550s 1622.848us 1 1 100.00
sec_cm_esc_timer_fsm_local_esc 1 1 100.00
alert_handler_sec_cm 12.550s 1622.848us 1 1 100.00
sec_cm_ping_timer_fsm_local_esc 1 1 100.00
alert_handler_sec_cm 12.550s 1622.848us 1 1 100.00
sec_cm_esc_timer_fsm_global_esc 1 1 100.00
alert_handler_sec_cm 12.550s 1622.848us 1 1 100.00
sec_cm_accu_ctr_redun 1 1 100.00
alert_handler_sec_cm 12.550s 1622.848us 1 1 100.00
sec_cm_esc_timer_ctr_redun 1 1 100.00
alert_handler_sec_cm 12.550s 1622.848us 1 1 100.00
sec_cm_ping_timer_ctr_redun 1 1 100.00
alert_handler_sec_cm 12.550s 1622.848us 1 1 100.00
sec_cm_ping_timer_lfsr_redun 1 1 100.00
alert_handler_sec_cm 12.550s 1622.848us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
alert_handler_stress_all_with_rand_reset 271.760s 9691.319us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (alert_handler_scoreboard.sv:604) scoreboard [scoreboard] Register/crashdump mismatch. loc_alert_cause[*] is * in the crashdump and * in the register model. 1 test run
alert_handler_ping_timeout 25111813664902603645457931595541550547995901323475920730379289537756752986444 86
UVM_INFO @ 1046499199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped 1 test run
alert_handler_entropy_stress 40375283461687100355782608856771458478763230982033458357556125857849461361324 182
UVM_INFO @ 286671325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (alert_handler_scoreboard.sv:258) scoreboard [scoreboard] Unexpected interrupt value in cfg.intr_vif.pins[*]: saw *, but expected *. (is_int_err = *, local_alert_type = LocalEscIntFail) 1 test run
alert_handler_stress_all 92771461217501557041548136256208711351230219627025037062258342769632373761997 91
UVM_INFO @ 1874692309 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---