Simulation Results: ac_range_check

 
01/09/2026 21:34:42 DVSim: v1.52.0 sha: 4e5c99d json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 82.88 %
  • code
  • 93.06 %
  • assert
  • 97.75 %
  • func
  • 57.84 %
  • block
  • 99.10 %
  • line
  • 99.93 %
  • branch
  • 98.24 %
  • toggle
  • 81.00 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 40.000s 1751.793us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 62.000s 2528.958us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 10.000s 292.266us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 10.000s 48.668us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 45.000s 2634.932us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 13.000s 866.035us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 10.000s 108.743us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 10.000s 48.668us 1 1 100.00
ac_range_check_csr_aliasing 13.000s 866.035us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 10.000s 246.704us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 33.000s 1869.159us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 188.000s 25538.338us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 10.000s 133.329us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 10.000s 15.191us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 7.000s 410.180us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 7.000s 410.180us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 10.000s 292.266us 1 1 100.00
ac_range_check_csr_rw 10.000s 48.668us 1 1 100.00
ac_range_check_csr_aliasing 13.000s 866.035us 1 1 100.00
ac_range_check_same_csr_outstanding 11.000s 674.903us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 10.000s 292.266us 1 1 100.00
ac_range_check_csr_rw 10.000s 48.668us 1 1 100.00
ac_range_check_csr_aliasing 13.000s 866.035us 1 1 100.00
ac_range_check_same_csr_outstanding 11.000s 674.903us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 21.000s 935.145us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 21.000s 935.145us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 21.000s 935.145us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 21.000s 935.145us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 80.000s 8631.337us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 6.000s 51.000us 1 1 100.00
ac_range_check_tl_intg_err 9.000s 1990.478us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 328.000s 5115.813us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 40.000s 1621.703us 1 1 100.00