Simulation Results: otbn

 
01/09/2026 21:34:42 DVSim: v1.52.0 sha: 4e5c99d json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 91.19 %
  • code
  • 86.16 %
  • assert
  • 89.96 %
  • func
  • 97.46 %
  • block
  • 99.21 %
  • line
  • 99.42 %
  • branch
  • 94.43 %
  • toggle
  • 84.60 %
  • FSM
  • 66.20 %
Validation stages
V1
100.00%
V2
100.00%
V2S
96.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 2 2 100.00
otbn_smoke 12.000s 41.180us 1 1 100.00
otbn_smoke_vectorized 10.000s 38.777us 1 1 100.00
single_binary 1 1 100.00
otbn_single 7.000s 23.500us 1 1 100.00
csr_hw_reset 1 1 100.00
otbn_csr_hw_reset 5.000s 15.746us 1 1 100.00
csr_rw 1 1 100.00
otbn_csr_rw 5.000s 26.810us 1 1 100.00
csr_bit_bash 1 1 100.00
otbn_csr_bit_bash 8.000s 93.487us 1 1 100.00
csr_aliasing 1 1 100.00
otbn_csr_aliasing 6.000s 80.009us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otbn_csr_mem_rw_with_rand_reset 10.000s 72.954us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otbn_csr_rw 5.000s 26.810us 1 1 100.00
otbn_csr_aliasing 6.000s 80.009us 1 1 100.00
mem_walk 1 1 100.00
otbn_mem_walk 180.000s 6659.764us 1 1 100.00
mem_partial_access 1 1 100.00
otbn_mem_partial_access 38.000s 334.050us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_recovery 1 1 100.00
otbn_reset 44.000s 160.311us 1 1 100.00
multi_error 1 1 100.00
otbn_multi_err 92.000s 172.424us 1 1 100.00
back_to_back 1 1 100.00
otbn_multi 127.000s 1140.952us 1 1 100.00
stress_all 1 1 100.00
otbn_stress_all 101.000s 1596.036us 1 1 100.00
lc_escalation 1 1 100.00
otbn_escalate 20.000s 62.678us 1 1 100.00
zero_state_err_urnd 1 1 100.00
otbn_zero_state_err_urnd 8.000s 28.667us 1 1 100.00
sw_errs_fatal_chk 1 1 100.00
otbn_sw_errs_fatal_chk 10.000s 73.459us 1 1 100.00
alert_test 1 1 100.00
otbn_alert_test 7.000s 14.274us 1 1 100.00
intr_test 1 1 100.00
otbn_intr_test 5.000s 37.063us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otbn_tl_errors 6.000s 104.789us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otbn_tl_errors 6.000s 104.789us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otbn_csr_hw_reset 5.000s 15.746us 1 1 100.00
otbn_csr_rw 5.000s 26.810us 1 1 100.00
otbn_csr_aliasing 6.000s 80.009us 1 1 100.00
otbn_same_csr_outstanding 6.000s 26.572us 1 1 100.00
tl_d_partial_access 4 4 100.00
otbn_csr_hw_reset 5.000s 15.746us 1 1 100.00
otbn_csr_rw 5.000s 26.810us 1 1 100.00
otbn_csr_aliasing 6.000s 80.009us 1 1 100.00
otbn_same_csr_outstanding 6.000s 26.572us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mem_integrity 2 2 100.00
otbn_imem_err 9.000s 72.193us 1 1 100.00
otbn_dmem_err 15.000s 22.175us 1 1 100.00
internal_integrity 3 4 75.00
otbn_alu_bignum_mod_err 13.000s 23.420us 1 1 100.00
otbn_controller_ispr_rdata_err 56.000s 0.000us 0 1 0.00
otbn_mac_bignum_acc_err 12.000s 53.837us 1 1 100.00
otbn_urnd_err 6.000s 25.757us 1 1 100.00
illegal_bus_access 1 1 100.00
otbn_illegal_mem_acc 9.000s 234.035us 1 1 100.00
otbn_mem_gnt_acc_err 1 1 100.00
otbn_mem_gnt_acc_err 8.000s 38.756us 1 1 100.00
otbn_non_sec_partial_wipe 1 1 100.00
otbn_partial_wipe 7.000s 39.738us 1 1 100.00
tl_intg_err 2 2 100.00
otbn_sec_cm 500.000s 12095.105us 1 1 100.00
otbn_tl_intg_err 17.000s 547.318us 1 1 100.00
passthru_mem_tl_intg_err 1 1 100.00
otbn_passthru_mem_tl_intg_err 35.000s 405.386us 1 1 100.00
prim_fsm_check 1 1 100.00
otbn_sec_cm 500.000s 12095.105us 1 1 100.00
prim_count_check 1 1 100.00
otbn_sec_cm 500.000s 12095.105us 1 1 100.00
sec_cm_mem_scramble 1 1 100.00
otbn_smoke 12.000s 41.180us 1 1 100.00
sec_cm_data_mem_integrity 1 1 100.00
otbn_dmem_err 15.000s 22.175us 1 1 100.00
sec_cm_instruction_mem_integrity 1 1 100.00
otbn_imem_err 9.000s 72.193us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otbn_tl_intg_err 17.000s 547.318us 1 1 100.00
sec_cm_controller_fsm_global_esc 1 1 100.00
otbn_escalate 20.000s 62.678us 1 1 100.00
sec_cm_controller_fsm_local_esc 5 5 100.00
otbn_imem_err 9.000s 72.193us 1 1 100.00
otbn_dmem_err 15.000s 22.175us 1 1 100.00
otbn_zero_state_err_urnd 8.000s 28.667us 1 1 100.00
otbn_illegal_mem_acc 9.000s 234.035us 1 1 100.00
otbn_sec_cm 500.000s 12095.105us 1 1 100.00
sec_cm_controller_fsm_sparse 1 1 100.00
otbn_sec_cm 500.000s 12095.105us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
otbn_single 7.000s 23.500us 1 1 100.00
sec_cm_scramble_ctrl_fsm_local_esc 5 5 100.00
otbn_imem_err 9.000s 72.193us 1 1 100.00
otbn_dmem_err 15.000s 22.175us 1 1 100.00
otbn_zero_state_err_urnd 8.000s 28.667us 1 1 100.00
otbn_illegal_mem_acc 9.000s 234.035us 1 1 100.00
otbn_sec_cm 500.000s 12095.105us 1 1 100.00
sec_cm_scramble_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 500.000s 12095.105us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_global_esc 1 1 100.00
otbn_escalate 20.000s 62.678us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_local_esc 5 5 100.00
otbn_imem_err 9.000s 72.193us 1 1 100.00
otbn_dmem_err 15.000s 22.175us 1 1 100.00
otbn_zero_state_err_urnd 8.000s 28.667us 1 1 100.00
otbn_illegal_mem_acc 9.000s 234.035us 1 1 100.00
otbn_sec_cm 500.000s 12095.105us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 500.000s 12095.105us 1 1 100.00
sec_cm_data_reg_sw_sca 1 1 100.00
otbn_single 7.000s 23.500us 1 1 100.00
sec_cm_ctrl_redun 1 1 100.00
otbn_ctrl_redun 10.000s 48.305us 1 1 100.00
sec_cm_pc_ctrl_flow_redun 1 1 100.00
otbn_pc_ctrl_flow_redun 9.000s 59.965us 1 1 100.00
sec_cm_rnd_bus_consistency 1 1 100.00
otbn_rnd_sec_cm 35.000s 154.244us 1 1 100.00
sec_cm_rnd_rng_digest 1 1 100.00
otbn_rnd_sec_cm 35.000s 154.244us 1 1 100.00
sec_cm_rf_base_data_reg_sw_integrity 1 1 100.00
otbn_rf_base_intg_err 11.000s 68.851us 1 1 100.00
sec_cm_rf_base_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 500.000s 12095.105us 1 1 100.00
sec_cm_stack_wr_ptr_ctr_redun 1 1 100.00
otbn_sec_cm 500.000s 12095.105us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_integrity 1 1 100.00
otbn_rf_bignum_intg_err 13.000s 122.496us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 500.000s 12095.105us 1 1 100.00
sec_cm_loop_stack_ctr_redun 1 1 100.00
otbn_sec_cm 500.000s 12095.105us 1 1 100.00
sec_cm_loop_stack_addr_integrity 1 1 100.00
otbn_stack_addr_integ_chk 21.000s 132.259us 1 1 100.00
sec_cm_call_stack_addr_integrity 1 1 100.00
otbn_stack_addr_integ_chk 21.000s 132.259us 1 1 100.00
sec_cm_start_stop_ctrl_state_consistency 1 1 100.00
otbn_sec_wipe_err 10.000s 70.406us 1 1 100.00
sec_cm_data_mem_sec_wipe 1 1 100.00
otbn_single 7.000s 23.500us 1 1 100.00
sec_cm_instruction_mem_sec_wipe 1 1 100.00
otbn_single 7.000s 23.500us 1 1 100.00
sec_cm_data_reg_sw_sec_wipe 1 1 100.00
otbn_single 7.000s 23.500us 1 1 100.00
sec_cm_write_mem_integrity 1 1 100.00
otbn_multi 127.000s 1140.952us 1 1 100.00
sec_cm_ctrl_flow_count 1 1 100.00
otbn_single 7.000s 23.500us 1 1 100.00
sec_cm_ctrl_flow_sca 1 1 100.00
otbn_single 7.000s 23.500us 1 1 100.00
sec_cm_data_mem_sw_noaccess 1 1 100.00
otbn_sw_no_acc 13.000s 314.207us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
otbn_single 7.000s 23.500us 1 1 100.00
sec_cm_tlul_fifo_ctr_redun 1 1 100.00
otbn_sec_cm 500.000s 12095.105us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
otbn_stress_all_with_rand_reset 414.000s 3122.987us 1 1 100.00

Error Messages

   Test seed line log context
Some pass patterns missing: ['^TEST PASSED (UVM_)?CHECKS$'] 1 test run
otbn_controller_ispr_rdata_err 20461510236171019459669761765909249087006218439040362443706546450361583890053 None
Error when resetting ISS: Failed to run command 'reset': EOF from ISS.
Error when resetting ISS: Failed to run command 'reset': EOF from ISS.
Error when resetting ISS: Failed to run command 'reset': EOF from ISS.
Error when resetting ISS: Failed to run command 'reset': EOF from ISS.
terminate called after throwing an instance of 'std::runtime_error'
what(): Failed to run command 'initial_secure_wipe': EOF from ISS.
xmsim: *F,SIGUSR: Unix Signal SIGABRT raised from user application code. Stack trace information is captured in file /nightly/currentn/scratch/masmaster/otbn-sim-xcelium/0.otbn_controller_ispr_rdata_err/latest/sigusrdump.out.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 01, 2026 at 21:49:56 UTC (total: 00:00:56)
WARNING: Destroying OtbnTraceChecker object with an unfinished operation.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 2