Simulation Results: gpio

 
02/09/2026 21:28:39 DVSim: v1.52.0 sha: e5cd915 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 90.20 %
  • code
  • 71.86 %
  • assert
  • 98.73 %
  • func
  • 100.00 %
  • line
  • 92.70 %
  • branch
  • 88.93 %
  • cond
  • 89.57 %
  • toggle
  • 78.74 %
  • FSM
  • 9.38 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.290s 31.441us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.790s 336.387us 1 1 100.00
gpio_smoke_en_cdc_prim 1.570s 244.671us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 2.300s 110.891us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 1.090s 30.827us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 1.130s 155.381us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 8.570s 3513.634us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.030s 62.509us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 1.000s 22.977us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 1.130s 155.381us 1 1 100.00
gpio_csr_aliasing 1.030s 62.509us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.610s 248.721us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.000s 35.532us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 1.370s 105.144us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.690s 102.021us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 3.500s 538.592us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 4.620s 472.005us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 36.810s 1008.115us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 4.960s 928.455us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 1.550s 326.627us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 53.950s 5928.652us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.850s 14.210us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.920s 49.536us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 2.140s 142.160us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 2.140s 142.160us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 1.130s 155.381us 1 1 100.00
gpio_same_csr_outstanding 1.120s 26.666us 1 1 100.00
gpio_csr_aliasing 1.030s 62.509us 1 1 100.00
gpio_csr_hw_reset 1.090s 30.827us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 1.130s 155.381us 1 1 100.00
gpio_same_csr_outstanding 1.120s 26.666us 1 1 100.00
gpio_csr_aliasing 1.030s 62.509us 1 1 100.00
gpio_csr_hw_reset 1.090s 30.827us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 2.930s 115.562us 1 1 100.00
gpio_sec_cm 1.320s 416.088us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 2.930s 115.562us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.920s 43.526us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 12.760s 3790.403us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
gpio_inp_prd_cnt 0.880s 15.154us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:243) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 38512149731849107614318076740051302970541228346331982294957185093597291402899 787
UVM_INFO @ 5928652261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 1 test run
gpio_stress_all_with_rand_reset 99616557021438856054050925555177010996598292298343357223001309053109647728844 352
UVM_INFO @ 3790403111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---