Simulation Results: mbx

 
02/09/2026 21:28:39 DVSim: v1.52.0 sha: e5cd915 json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 87.47 %
  • code
  • 89.18 %
  • assert
  • 96.96 %
  • func
  • 76.26 %
  • block
  • 96.88 %
  • line
  • 96.71 %
  • branch
  • 91.89 %
  • toggle
  • 78.94 %
Validation stages
V1
83.33%
V2
81.82%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_smoke 1 1 100.00
mbx_smoke 31.000s 3665.108us 1 1 100.00
csr_hw_reset 1 1 100.00
mbx_csr_hw_reset 2.000s 24.386us 1 1 100.00
csr_rw 1 1 100.00
mbx_csr_rw 2.000s 16.073us 1 1 100.00
csr_bit_bash 1 1 100.00
mbx_csr_bit_bash 2.000s 105.256us 1 1 100.00
csr_aliasing 1 1 100.00
mbx_csr_aliasing 2.000s 24.280us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
mbx_csr_mem_rw_with_rand_reset 2.000s 34.096us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
mbx_csr_rw 2.000s 16.073us 1 1 100.00
mbx_csr_aliasing 2.000s 24.280us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_stress 0 1 0.00
mbx_stress 224.000s 200000.000us 0 1 0.00
mbx_max_activity 1 1 100.00
mbx_stress_zero_delays 128.000s 7602.054us 1 1 100.00
mbx_imbx_oob 1 1 100.00
mbx_imbx_oob 28.000s 11775.147us 1 1 100.00
mbx_doe_intr_msg 1 1 100.00
mbx_doe_intr_msg 12.000s 12700.318us 1 1 100.00
alert_test 1 1 100.00
mbx_alert_test 2.000s 16.028us 1 1 100.00
intr_test 1 1 100.00
mbx_intr_test 1.000s 16.987us 1 1 100.00
tl_d_oob_addr_access 0 1 0.00
mbx_tl_errors 2.000s 4.764us 0 1 0.00
tl_d_illegal_access 0 1 0.00
mbx_tl_errors 2.000s 4.764us 0 1 0.00
tl_d_outstanding_access 4 4 100.00
mbx_csr_hw_reset 2.000s 24.386us 1 1 100.00
mbx_csr_rw 2.000s 16.073us 1 1 100.00
mbx_csr_aliasing 2.000s 24.280us 1 1 100.00
mbx_same_csr_outstanding 2.000s 49.397us 1 1 100.00
tl_d_partial_access 4 4 100.00
mbx_csr_hw_reset 2.000s 24.386us 1 1 100.00
mbx_csr_rw 2.000s 16.073us 1 1 100.00
mbx_csr_aliasing 2.000s 24.280us 1 1 100.00
mbx_same_csr_outstanding 2.000s 49.397us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
mbx_tl_intg_err 2.000s 272.604us 1 1 100.00
mbx_sec_cm 1.000s 32.279us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:718) scoreboard [scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted *, but saw *). 2 test runs
mbx_tl_errors 68078707763779452571813861544233529533869500713102337405154022055146744812277 85
TL item was: req: (cip_tl_seq_item@21705) { a_addr: 'h237fe2d0 a_data: 'h181496d2 a_mask: 'h3 a_size: 'h1 a_param: 'h0 a_source: 'h23 a_opcode: 'h0 a_user: 'h27a6e d_param: 'h0 d_source: 'h23 d_data: 'h0 d_size: 'h1 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h10aa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 4763513 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
mbx_csr_mem_rw_with_rand_reset 92572575089948897519476540036437142869349423319971542267343183027908368671667 86
TL item was: req: (cip_tl_seq_item@20698) { a_addr: 'h217d9dd4 a_data: 'hde5c3ca8 a_mask: 'h4 a_size: 'h2 a_param: 'h0 a_source: 'ha3 a_opcode: 'h1 a_user: 'h2448a d_param: 'h0 d_source: 'ha3 d_data: 'h0 d_size: 'h2 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h1caa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 34096135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue 1 test run
mbx_stress 66195307288658358565148906572833856974832873554626646512757360967708530610689 47498
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---