Simulation Results: ac_range_check

 
03/09/2026 16:40:21 DVSim: v1.52.1 sha: 119f86a json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 82.88 %
  • code
  • 93.06 %
  • assert
  • 97.75 %
  • func
  • 57.84 %
  • block
  • 99.10 %
  • line
  • 99.93 %
  • branch
  • 98.24 %
  • toggle
  • 81.00 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 34.000s 2007.313us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 48.000s 710.868us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 11.000s 440.596us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 11.000s 190.084us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 43.000s 3206.011us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 14.000s 455.028us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 10.000s 26.306us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 11.000s 190.084us 1 1 100.00
ac_range_check_csr_aliasing 14.000s 455.028us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 9.000s 150.511us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 35.000s 492.765us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 164.000s 19240.661us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 10.000s 14.231us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 10.000s 19.619us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 7.000s 30.314us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 7.000s 30.314us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 11.000s 440.596us 1 1 100.00
ac_range_check_csr_rw 11.000s 190.084us 1 1 100.00
ac_range_check_csr_aliasing 14.000s 455.028us 1 1 100.00
ac_range_check_same_csr_outstanding 9.000s 58.748us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 11.000s 440.596us 1 1 100.00
ac_range_check_csr_rw 11.000s 190.084us 1 1 100.00
ac_range_check_csr_aliasing 14.000s 455.028us 1 1 100.00
ac_range_check_same_csr_outstanding 9.000s 58.748us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 23.000s 1199.523us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 23.000s 1199.523us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 23.000s 1199.523us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 23.000s 1199.523us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 92.000s 2943.395us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 7.000s 17.234us 1 1 100.00
ac_range_check_tl_intg_err 15.000s 1992.642us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 344.000s 2894.592us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 44.000s 5823.125us 1 1 100.00