Simulation Results: aes/gcm_masked

 
03/09/2026 16:40:21 DVSim: v1.52.1 sha: 119f86a json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 85.83 %
  • code
  • 95.13 %
  • assert
  • 98.29 %
  • func
  • 64.07 %
  • block
  • 95.74 %
  • line
  • 97.50 %
  • branch
  • 89.48 %
  • toggle
  • 98.05 %
  • FSM
  • 95.48 %
Validation stages
V1
100.00%
V2
89.47%
V2S
88.89%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 3.000s 82.439us 1 1 100.00
smoke 1 1 100.00
aes_smoke 5.000s 137.878us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 1.000s 108.511us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 2.000s 144.055us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 7.000s 255.958us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 2.000s 60.667us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 1.000s 53.661us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 2.000s 144.055us 1 1 100.00
aes_csr_aliasing 2.000s 60.667us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 5.000s 137.878us 1 1 100.00
aes_config_error 3.000s 67.556us 1 1 100.00
aes_stress 2.000s 234.151us 1 1 100.00
key_length 3 3 100.00
aes_smoke 5.000s 137.878us 1 1 100.00
aes_config_error 3.000s 67.556us 1 1 100.00
aes_stress 2.000s 234.151us 1 1 100.00
back2back 2 2 100.00
aes_stress 2.000s 234.151us 1 1 100.00
aes_b2b 7.000s 174.380us 1 1 100.00
backpressure 1 1 100.00
aes_stress 2.000s 234.151us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 5.000s 137.878us 1 1 100.00
aes_config_error 3.000s 67.556us 1 1 100.00
aes_stress 2.000s 234.151us 1 1 100.00
aes_alert_reset 2.000s 247.085us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 52.033us 1 1 100.00
aes_config_error 3.000s 67.556us 1 1 100.00
aes_alert_reset 2.000s 247.085us 1 1 100.00
trigger_clear_test 0 1 0.00
aes_clear 3.000s 80.634us 0 1 0.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 9.000s 459.570us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 10.000s 402.684us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 2.000s 247.085us 1 1 100.00
stress 1 1 100.00
aes_stress 2.000s 234.151us 1 1 100.00
sideload 2 2 100.00
aes_stress 2.000s 234.151us 1 1 100.00
aes_sideload 7.000s 301.825us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 4.000s 81.416us 1 1 100.00
stress_all 0 1 0.00
aes_stress_all 21.000s 618.625us 0 1 0.00
gcm_save_and_restore 1 1 100.00
aes_gcm_save_restore 4.000s 201.777us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 2.000s 123.190us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 3.000s 225.137us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 3.000s 225.137us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 1.000s 108.511us 1 1 100.00
aes_csr_rw 2.000s 144.055us 1 1 100.00
aes_csr_aliasing 2.000s 60.667us 1 1 100.00
aes_same_csr_outstanding 3.000s 606.104us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 1.000s 108.511us 1 1 100.00
aes_csr_rw 2.000s 144.055us 1 1 100.00
aes_csr_aliasing 2.000s 60.667us 1 1 100.00
aes_same_csr_outstanding 3.000s 606.104us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 2.000s 74.700us 1 1 100.00
fault_inject 2 3 66.67
aes_fi 6.000s 211.339us 0 1 0.00
aes_control_fi 2.000s 64.113us 1 1 100.00
aes_cipher_fi 2.000s 110.413us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 3.000s 173.779us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 3.000s 173.779us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 3.000s 173.779us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 3.000s 173.779us 1 1 100.00
shadow_reg_update_error_with_csr_rw 0 1 0.00
aes_shadow_reg_errors_with_csr_rw 2.000s 70.366us 0 1 0.00
tl_intg_err 2 2 100.00
aes_sec_cm 6.000s 814.919us 1 1 100.00
aes_tl_intg_err 4.000s 281.432us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 4.000s 281.432us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 2.000s 247.085us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 3.000s 173.779us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 3.000s 173.779us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 5.000s 137.878us 1 1 100.00
aes_stress 2.000s 234.151us 1 1 100.00
aes_alert_reset 2.000s 247.085us 1 1 100.00
aes_core_fi 3.000s 196.816us 1 1 100.00
sec_cm_gcm_config_sparse 4 4 100.00
aes_gcm_save_restore 4.000s 201.777us 1 1 100.00
aes_config_error 3.000s 67.556us 1 1 100.00
aes_stress 2.000s 234.151us 1 1 100.00
aes_core_fi 3.000s 196.816us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 3.000s 173.779us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 3.000s 73.127us 1 1 100.00
aes_stress 2.000s 234.151us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 2.000s 234.151us 1 1 100.00
aes_sideload 7.000s 301.825us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 3.000s 73.127us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 3.000s 73.127us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 3.000s 73.127us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 3.000s 73.127us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 3.000s 73.127us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 2.000s 234.151us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 2.000s 234.151us 1 1 100.00
sec_cm_main_fsm_sparse 0 1 0.00
aes_fi 6.000s 211.339us 0 1 0.00
sec_cm_main_fsm_redun 3 4 75.00
aes_fi 6.000s 211.339us 0 1 0.00
aes_control_fi 2.000s 64.113us 1 1 100.00
aes_cipher_fi 2.000s 110.413us 1 1 100.00
aes_ctr_fi 2.000s 108.708us 1 1 100.00
sec_cm_cipher_fsm_sparse 0 1 0.00
aes_fi 6.000s 211.339us 0 1 0.00
sec_cm_cipher_fsm_redun 2 3 66.67
aes_fi 6.000s 211.339us 0 1 0.00
aes_control_fi 2.000s 64.113us 1 1 100.00
aes_cipher_fi 2.000s 110.413us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 110.413us 1 1 100.00
sec_cm_ctr_fsm_sparse 0 1 0.00
aes_fi 6.000s 211.339us 0 1 0.00
sec_cm_ctr_fsm_redun 2 3 66.67
aes_fi 6.000s 211.339us 0 1 0.00
aes_control_fi 2.000s 64.113us 1 1 100.00
aes_ctr_fi 2.000s 108.708us 1 1 100.00
sec_cm_ghash_fsm_sparse 0 1 0.00
aes_fi 6.000s 211.339us 0 1 0.00
sec_cm_ctrl_sparse 3 4 75.00
aes_fi 6.000s 211.339us 0 1 0.00
aes_control_fi 2.000s 64.113us 1 1 100.00
aes_cipher_fi 2.000s 110.413us 1 1 100.00
aes_ctr_fi 2.000s 108.708us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 2.000s 247.085us 1 1 100.00
sec_cm_main_fsm_local_esc 3 4 75.00
aes_fi 6.000s 211.339us 0 1 0.00
aes_control_fi 2.000s 64.113us 1 1 100.00
aes_cipher_fi 2.000s 110.413us 1 1 100.00
aes_ctr_fi 2.000s 108.708us 1 1 100.00
sec_cm_cipher_fsm_local_esc 3 4 75.00
aes_fi 6.000s 211.339us 0 1 0.00
aes_control_fi 2.000s 64.113us 1 1 100.00
aes_cipher_fi 2.000s 110.413us 1 1 100.00
aes_ctr_fi 2.000s 108.708us 1 1 100.00
sec_cm_ctr_fsm_local_esc 2 3 66.67
aes_fi 6.000s 211.339us 0 1 0.00
aes_control_fi 2.000s 64.113us 1 1 100.00
aes_ctr_fi 2.000s 108.708us 1 1 100.00
sec_cm_ghash_fsm_local_esc 1 2 50.00
aes_ghash_fi 3.000s 68.771us 1 1 100.00
aes_fi 6.000s 211.339us 0 1 0.00
sec_cm_data_reg_local_esc 2 3 66.67
aes_fi 6.000s 211.339us 0 1 0.00
aes_control_fi 2.000s 64.113us 1 1 100.00
aes_cipher_fi 2.000s 110.413us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 2.000s 9.917us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_scoreboard.sv:923) scoreboard [scoreboard] 2 test runs
aes_fi 18258531720209244600714627076556604634745811632764853688197392583749616543893 7521
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
aes_stress_all 67592716044538408296444279415520854745983389968867020371797444257788736595777 43701
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 10
----| Seen: 9
----| Expected corrupted: 0
UVM_FATAL (aes_scoreboard.sv:782) scoreboard [scoreboard] # * 1 test run
aes_clear 112926620839944178824675287171848887788679482464125367622473496252160471961310 9602
TEST FAILED MESSAGES DID NOT MATCH
0 d9 1e 4a 0
1 00 04 a3 0
UVM_FATAL (aes_base_vseq.sv:87) [aes_stress_all_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) 1 test run
aes_stress_all_with_rand_reset 90124354977115139566968392480242352565198706199070578571067294469875192698913 112
UVM_INFO @ 9916841 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1391) [aes_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault does not trigger! 1 test run
aes_shadow_reg_errors_with_csr_rw 20643519843905450334436561968410741470812123400680944018586185362104510396146 109
UVM_INFO @ 70366181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---