Simulation Results: ac_range_check

 
08/09/2026 15:31:51 DVSim: v1.52.1 sha: 82334bf json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 82.96 %
  • code
  • 93.15 %
  • assert
  • 97.75 %
  • func
  • 57.98 %
  • block
  • 99.10 %
  • line
  • 99.93 %
  • branch
  • 98.24 %
  • toggle
  • 81.27 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 37.000s 1905.949us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 51.000s 721.962us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 9.000s 179.968us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 9.000s 85.066us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 47.000s 2718.739us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 11.000s 74.247us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 10.000s 20.937us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 9.000s 85.066us 1 1 100.00
ac_range_check_csr_aliasing 11.000s 74.247us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 9.000s 66.164us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 42.000s 6779.533us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 243.000s 11758.652us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 9.000s 24.977us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 7.000s 49.178us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 9.000s 150.476us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 9.000s 150.476us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 9.000s 179.968us 1 1 100.00
ac_range_check_csr_rw 9.000s 85.066us 1 1 100.00
ac_range_check_csr_aliasing 11.000s 74.247us 1 1 100.00
ac_range_check_same_csr_outstanding 9.000s 59.657us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 9.000s 179.968us 1 1 100.00
ac_range_check_csr_rw 9.000s 85.066us 1 1 100.00
ac_range_check_csr_aliasing 11.000s 74.247us 1 1 100.00
ac_range_check_same_csr_outstanding 9.000s 59.657us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 27.000s 3681.931us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 27.000s 3681.931us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 27.000s 3681.931us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 27.000s 3681.931us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 134.000s 5388.934us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 7.000s 41.509us 1 1 100.00
ac_range_check_tl_intg_err 11.000s 457.919us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 278.000s 645.326us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 42.000s 6199.902us 1 1 100.00