Simulation Results: mbx

 
08/09/2026 15:31:51 DVSim: v1.52.1 sha: 82334bf json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 87.15 %
  • code
  • 87.38 %
  • assert
  • 97.43 %
  • func
  • 76.65 %
  • block
  • 95.61 %
  • line
  • 95.13 %
  • branch
  • 88.29 %
  • toggle
  • 78.73 %
Validation stages
V1
83.33%
V2
81.82%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_smoke 1 1 100.00
mbx_smoke 96.000s 14910.514us 1 1 100.00
csr_hw_reset 1 1 100.00
mbx_csr_hw_reset 1.000s 17.688us 1 1 100.00
csr_rw 1 1 100.00
mbx_csr_rw 1.000s 36.192us 1 1 100.00
csr_bit_bash 1 1 100.00
mbx_csr_bit_bash 3.000s 382.753us 1 1 100.00
csr_aliasing 1 1 100.00
mbx_csr_aliasing 2.000s 24.407us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
mbx_csr_mem_rw_with_rand_reset 1.000s 30.119us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
mbx_csr_rw 1.000s 36.192us 1 1 100.00
mbx_csr_aliasing 2.000s 24.407us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_stress 1 1 100.00
mbx_stress 164.000s 130061.061us 1 1 100.00
mbx_max_activity 0 1 0.00
mbx_stress_zero_delays 4.000s 116.518us 0 1 0.00
mbx_imbx_oob 1 1 100.00
mbx_imbx_oob 12.000s 1006.970us 1 1 100.00
mbx_doe_intr_msg 1 1 100.00
mbx_doe_intr_msg 11.000s 3038.888us 1 1 100.00
alert_test 1 1 100.00
mbx_alert_test 1.000s 16.113us 1 1 100.00
intr_test 1 1 100.00
mbx_intr_test 2.000s 42.663us 1 1 100.00
tl_d_oob_addr_access 0 1 0.00
mbx_tl_errors 1.000s 1.894us 0 1 0.00
tl_d_illegal_access 0 1 0.00
mbx_tl_errors 1.000s 1.894us 0 1 0.00
tl_d_outstanding_access 4 4 100.00
mbx_csr_hw_reset 1.000s 17.688us 1 1 100.00
mbx_csr_rw 1.000s 36.192us 1 1 100.00
mbx_csr_aliasing 2.000s 24.407us 1 1 100.00
mbx_same_csr_outstanding 2.000s 42.547us 1 1 100.00
tl_d_partial_access 4 4 100.00
mbx_csr_hw_reset 1.000s 17.688us 1 1 100.00
mbx_csr_rw 1.000s 36.192us 1 1 100.00
mbx_csr_aliasing 2.000s 24.407us 1 1 100.00
mbx_same_csr_outstanding 2.000s 42.547us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
mbx_tl_intg_err 2.000s 173.079us 1 1 100.00
mbx_sec_cm 1.000s 19.336us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:718) scoreboard [scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted *, but saw *). 2 test runs
mbx_tl_errors 68518506779456096994792494811068895695128447248410734830606911307124908286724 85
TL item was: req: (cip_tl_seq_item@17936) { a_addr: 'hf776c834 a_data: 'h52e757d7 a_mask: 'h3 a_size: 'h1 a_param: 'h0 a_source: 'h61 a_opcode: 'h0 a_user: 'h273c6 d_param: 'h0 d_source: 'h61 d_data: 'h0 d_size: 'h1 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h10aa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 1893877 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
mbx_csr_mem_rw_with_rand_reset 39772701646538123328122056362452277684696485952533550954647532326221725403152 86
TL item was: req: (cip_tl_seq_item@18386) { a_addr: 'h370c0450 a_data: 'h8e1f701d a_mask: 'h1 a_size: 'h1 a_param: 'h0 a_source: 'h2d a_opcode: 'h1 a_user: 'h26a26 d_param: 'h0 d_source: 'h2d d_data: 'h0 d_size: 'h1 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h10aa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 30119053 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (mbx_scoreboard.sv:500) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) RDATA read data mismatched 1 test run
mbx_stress_zero_delays 83476234309840603763258622772294486198025937463357996316502206208310855845961 110
UVM_INFO @ 116517860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---