| V1 |
|
100.00% |
| V2 |
|
65.52% |
| V2S |
|
62.50% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| kmac_smoke | 90.600s | 20214.293us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| kmac_csr_hw_reset | 1.240s | 40.476us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| kmac_csr_rw | 1.440s | 121.732us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| kmac_csr_bit_bash | 10.630s | 1629.753us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| kmac_csr_aliasing | 1.690s | 86.248us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| kmac_csr_mem_rw_with_rand_reset | 3.250s | 118.823us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| kmac_csr_rw | 1.440s | 121.732us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 1.690s | 86.248us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| kmac_mem_walk | 1.070s | 25.232us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| kmac_mem_partial_access | 1.810s | 113.408us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| long_msg_and_output | 1 | 1 | 100.00 | |||
| kmac_long_msg_and_output | 1809.910s | 121981.225us | 1 | 1 | 100.00 | |
| burst_write | 1 | 1 | 100.00 | |||
| kmac_burst_write | 1308.130s | 33028.947us | 1 | 1 | 100.00 | |
| test_vectors | 8 | 8 | 100.00 | |||
| kmac_test_vectors_sha3_224 | 2210.640s | 127776.095us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_256 | 30.780s | 1356.537us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_384 | 2165.910s | 88785.406us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_512 | 22.440s | 1377.192us | 1 | 1 | 100.00 | |
| kmac_test_vectors_shake_128 | 221.970s | 12203.172us | 1 | 1 | 100.00 | |
| kmac_test_vectors_shake_256 | 219.420s | 95419.673us | 1 | 1 | 100.00 | |
| kmac_test_vectors_kmac | 3.940s | 60.566us | 1 | 1 | 100.00 | |
| kmac_test_vectors_kmac_xof | 3.150s | 188.068us | 1 | 1 | 100.00 | |
| sideload | 1 | 1 | 100.00 | |||
| kmac_sideload | 335.920s | 7516.989us | 1 | 1 | 100.00 | |
| app | 0 | 1 | 0.00 | |||
| kmac_app | 12.060s | 1404.207us | 0 | 1 | 0.00 | |
| app_with_partial_data | 0 | 1 | 0.00 | |||
| kmac_app_with_partial_data | 4.660s | 1104.672us | 0 | 1 | 0.00 | |
| entropy_refresh | 0 | 1 | 0.00 | |||
| kmac_entropy_refresh | 5.080s | 177.323us | 0 | 1 | 0.00 | |
| error | 0 | 1 | 0.00 | |||
| kmac_error | 170.140s | 10266.596us | 0 | 1 | 0.00 | |
| key_error | 0 | 1 | 0.00 | |||
| kmac_key_error | 1.200s | 15.283us | 0 | 1 | 0.00 | |
| sideload_invalid | 0 | 1 | 0.00 | |||
| kmac_sideload_invalid | 1.840s | 158.658us | 0 | 1 | 0.00 | |
| edn_timeout_error | 0 | 1 | 0.00 | |||
| kmac_edn_timeout_error | 7.250s | 963.548us | 0 | 1 | 0.00 | |
| entropy_mode_error | 1 | 1 | 100.00 | |||
| kmac_entropy_mode_error | 1.230s | 38.386us | 1 | 1 | 100.00 | |
| entropy_ready_error | 0 | 1 | 0.00 | |||
| kmac_entropy_ready_error | 1.050s | 19.511us | 0 | 1 | 0.00 | |
| lc_escalation | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 1.710s | 269.785us | 0 | 1 | 0.00 | |
| stress_all | 0 | 1 | 0.00 | |||
| kmac_stress_all | 8.410s | 3954.478us | 0 | 1 | 0.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| kmac_intr_test | 1.100s | 42.370us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| kmac_alert_test | 1.040s | 68.176us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 3.280s | 87.480us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 3.280s | 87.480us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 1.240s | 40.476us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 1.440s | 121.732us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 1.690s | 86.248us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 1.840s | 25.923us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 1.240s | 40.476us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 1.440s | 121.732us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 1.690s | 86.248us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 1.840s | 25.923us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 2.570s | 145.024us | 1 | 1 | 100.00 | |
| shadow_reg_read_clear_staged_value | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 2.570s | 145.024us | 1 | 1 | 100.00 | |
| shadow_reg_storage_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 2.570s | 145.024us | 1 | 1 | 100.00 | |
| shadowed_reset_glitch | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 2.570s | 145.024us | 1 | 1 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors_with_csr_rw | 2.860s | 52.588us | 1 | 1 | 100.00 | |
| tl_intg_err | 1 | 2 | 50.00 | |||
| kmac_sec_cm | 1.740s | 159.857us | 0 | 1 | 0.00 | |
| kmac_tl_intg_err | 4.730s | 962.528us | 1 | 1 | 100.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| kmac_tl_intg_err | 4.730s | 962.528us | 1 | 1 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 1.710s | 269.785us | 0 | 1 | 0.00 | |
| sec_cm_sw_key_key_masking | 1 | 1 | 100.00 | |||
| kmac_smoke | 90.600s | 20214.293us | 1 | 1 | 100.00 | |
| sec_cm_key_sideload | 1 | 1 | 100.00 | |||
| kmac_sideload | 335.920s | 7516.989us | 1 | 1 | 100.00 | |
| sec_cm_cfg_shadowed_config_shadow | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 2.570s | 145.024us | 1 | 1 | 100.00 | |
| sec_cm_fsm_sparse | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.740s | 159.857us | 0 | 1 | 0.00 | |
| sec_cm_ctr_redun | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.740s | 159.857us | 0 | 1 | 0.00 | |
| sec_cm_packer_ctr_redun | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.740s | 159.857us | 0 | 1 | 0.00 | |
| sec_cm_cfg_shadowed_config_regwen | 1 | 1 | 100.00 | |||
| kmac_smoke | 90.600s | 20214.293us | 1 | 1 | 100.00 | |
| sec_cm_fsm_global_esc | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 1.710s | 269.785us | 0 | 1 | 0.00 | |
| sec_cm_fsm_local_esc | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 1.740s | 159.857us | 0 | 1 | 0.00 | |
| sec_cm_absorbed_ctrl_mubi | 0 | 1 | 0.00 | |||
| kmac_mubi | 26.440s | 1716.355us | 0 | 1 | 0.00 | |
| sec_cm_sw_cmd_ctrl_sparse | 1 | 1 | 100.00 | |||
| kmac_smoke | 90.600s | 20214.293us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| kmac_stress_all_with_rand_reset | 47.860s | 880.099us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (kmac_scoreboard.sv:524) scoreboard [scoreboard] Saw request be handled for app * when that app was not selected. | 5 test runs | |||
| kmac_app | 60530826038390521959716129839091297051935282689029943714108585627206229480614 | 79 |
UVM_INFO @ 1404206967 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_entropy_refresh | 29019863710170856739994785777297293154404109463657402944724508500871796967092 | 78 |
UVM_INFO @ 177323089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_key_error | 52459696857621715508050208618379868322153632232028603118103482392830696234178 | 77 |
UVM_INFO @ 15283106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_entropy_ready_error | 75839959401854921096853161026649429930140524095040144823484964628287796531710 | 77 |
UVM_INFO @ 19510635 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_stress_all_with_rand_reset | 6967396896504902593939818539763733494748158623312712087544508084684839363833 | 209 |
UVM_INFO @ 880099445 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] | 4 test runs | |||
| kmac_sideload_invalid | 14876706847064934326317688885683558319335025841793440918744140196005576791292 | 79 |
UVM_INFO @ 158658383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_app_with_partial_data | 81065363953090122158269795419108282414847575972333381299129195338835198884060 | 78 |
UVM_INFO @ 1104672220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_error | 98686186945882539770768797045441756241420347201107652959590906168317205567334 | 144 |
UVM_INFO @ 10266595962 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_stress_all | 43660550767108826083475613522039004528556618646726893098806894400700640787495 | 81 |
UVM_INFO @ 3954477705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL sequencer [sequencer] Item_done() called with no outstanding requests. Each call to item_done() must be paired with a previous call to get_next_item(). | 2 test runs | |||
| kmac_lc_escalation | 86001032111153424789833682311705111610347338709728870600015207108049687363943 | 81 |
UVM_INFO @ 269785230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_sec_cm | 26650743605671439174983581921354526028849783067913844408715100658238656715032 | 79 |
UVM_INFO @ 159856790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (kmac_scoreboard.sv:601) scoreboard [scoreboard] Unexpected m_error value in the app response (*) | 1 test run | |||
| kmac_mubi | 48732435675107692126020314482510417280068565542224994303859157989793887321328 | 84 |
UVM_INFO @ 1716354617 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' | 1 test run | |||
| kmac_edn_timeout_error | 70037228382765566355213471189738743417534086895285308072488713988156616407113 | 82 |
UVM_ERROR @ 963548474 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 963548474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|