Simulation Results: ac_range_check

 
10/09/2026 15:31:28 DVSim: v1.52.2 sha: 1133189 json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 82.83 %
  • code
  • 93.00 %
  • assert
  • 97.75 %
  • func
  • 57.75 %
  • block
  • 99.10 %
  • line
  • 99.93 %
  • branch
  • 98.24 %
  • toggle
  • 80.82 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 36.000s 489.429us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 44.000s 2436.377us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 10.000s 123.358us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 10.000s 59.990us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 47.000s 3172.554us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 13.000s 244.117us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 10.000s 139.503us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 10.000s 59.990us 1 1 100.00
ac_range_check_csr_aliasing 13.000s 244.117us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 10.000s 306.068us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 46.000s 1652.467us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 211.000s 6928.165us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 10.000s 30.463us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 10.000s 91.289us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 9.000s 332.316us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 9.000s 332.316us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 10.000s 123.358us 1 1 100.00
ac_range_check_csr_rw 10.000s 59.990us 1 1 100.00
ac_range_check_csr_aliasing 13.000s 244.117us 1 1 100.00
ac_range_check_same_csr_outstanding 11.000s 175.685us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 10.000s 123.358us 1 1 100.00
ac_range_check_csr_rw 10.000s 59.990us 1 1 100.00
ac_range_check_csr_aliasing 13.000s 244.117us 1 1 100.00
ac_range_check_same_csr_outstanding 11.000s 175.685us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 28.000s 1097.122us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 28.000s 1097.122us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 28.000s 1097.122us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 28.000s 1097.122us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 129.000s 4528.510us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 9.000s 37.149us 1 1 100.00
ac_range_check_tl_intg_err 17.000s 718.551us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 322.000s 1818.777us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 49.000s 2883.347us 1 1 100.00