Simulation Results: gpio

 
10/09/2026 15:31:28 DVSim: v1.52.2 sha: 1133189 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 89.97 %
  • code
  • 71.81 %
  • assert
  • 98.10 %
  • func
  • 100.00 %
  • line
  • 92.70 %
  • branch
  • 88.93 %
  • cond
  • 89.57 %
  • toggle
  • 78.46 %
  • FSM
  • 9.38 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.780s 80.134us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.920s 299.978us 1 1 100.00
gpio_smoke_en_cdc_prim 2.230s 56.281us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.340s 81.629us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.930s 16.376us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 1.060s 62.530us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 4.230s 1778.484us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.290s 139.031us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 1.010s 27.006us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 1.060s 62.530us 1 1 100.00
gpio_csr_aliasing 1.290s 139.031us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.720s 85.543us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.190s 73.578us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.930s 16.726us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.090s 114.653us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 3.290s 151.935us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 4.810s 94.445us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 25.370s 3244.222us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 6.610s 671.137us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 1.520s 99.951us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 1.650s 3014.266us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.870s 70.333us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.920s 85.997us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 3.130s 96.633us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 3.130s 96.633us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 1.060s 62.530us 1 1 100.00
gpio_same_csr_outstanding 1.350s 77.136us 1 1 100.00
gpio_csr_aliasing 1.290s 139.031us 1 1 100.00
gpio_csr_hw_reset 0.930s 16.376us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 1.060s 62.530us 1 1 100.00
gpio_same_csr_outstanding 1.350s 77.136us 1 1 100.00
gpio_csr_aliasing 1.290s 139.031us 1 1 100.00
gpio_csr_hw_reset 0.930s 16.376us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.780s 306.577us 1 1 100.00
gpio_sec_cm 1.280s 320.212us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.780s 306.577us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.770s 24.780us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 7.250s 427.986us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
gpio_inp_prd_cnt 0.880s 22.704us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:243) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 97655902840895014720956674707245549927588711494943096060238190049291594215430 84
UVM_INFO @ 3014265948 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1230) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 77233782263423678519466873751899286964452669098750637634423006191118077466915 154
UVM_INFO @ 427985774 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---