Simulation Results: ac_range_check

 
14/09/2026 15:31:43 DVSim: v1.53.0 sha: f87cc85 json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 82.89 %
  • code
  • 93.03 %
  • assert
  • 97.75 %
  • func
  • 57.88 %
  • block
  • 99.10 %
  • line
  • 99.93 %
  • branch
  • 98.24 %
  • toggle
  • 80.91 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 45.000s 6096.481us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 41.000s 2760.342us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 9.000s 143.532us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 9.000s 578.303us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 35.000s 722.035us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 12.000s 3798.275us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 9.000s 32.291us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 9.000s 578.303us 1 1 100.00
ac_range_check_csr_aliasing 12.000s 3798.275us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 8.000s 34.800us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 53.000s 3414.436us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 155.000s 4302.272us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 8.000s 37.978us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 8.000s 22.719us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 9.000s 1096.131us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 9.000s 1096.131us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 9.000s 143.532us 1 1 100.00
ac_range_check_csr_rw 9.000s 578.303us 1 1 100.00
ac_range_check_csr_aliasing 12.000s 3798.275us 1 1 100.00
ac_range_check_same_csr_outstanding 9.000s 69.204us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 9.000s 143.532us 1 1 100.00
ac_range_check_csr_rw 9.000s 578.303us 1 1 100.00
ac_range_check_csr_aliasing 12.000s 3798.275us 1 1 100.00
ac_range_check_same_csr_outstanding 9.000s 69.204us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 22.000s 5021.927us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 22.000s 5021.927us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 22.000s 5021.927us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 22.000s 5021.927us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 132.000s 4502.237us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 7.000s 11.198us 1 1 100.00
ac_range_check_tl_intg_err 13.000s 802.589us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 310.000s 2409.564us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 36.000s 2575.932us 1 1 100.00