Simulation Results: gpio

 
15/09/2026 15:31:43 DVSim: v1.53.0 sha: 2e7b496 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 90.06 %
  • code
  • 71.77 %
  • assert
  • 98.42 %
  • func
  • 100.00 %
  • line
  • 92.70 %
  • branch
  • 88.93 %
  • cond
  • 89.93 %
  • toggle
  • 77.89 %
  • FSM
  • 9.38 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.630s 155.095us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.860s 555.632us 1 1 100.00
gpio_smoke_en_cdc_prim 1.700s 153.074us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.530s 90.265us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 1.010s 15.658us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 1.000s 20.708us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 3.030s 426.391us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.250s 55.334us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 1.330s 66.311us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 1.000s 20.708us 1 1 100.00
gpio_csr_aliasing 1.250s 55.334us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.650s 74.249us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 0.820s 15.974us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 1.300s 202.360us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.830s 1263.414us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 2.640s 95.648us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 2.860s 86.174us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 21.490s 3630.794us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 3.640s 294.478us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 1.400s 83.183us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 18.650s 1052.440us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.890s 48.393us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.940s 46.407us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 2.270s 62.245us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 2.270s 62.245us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 1.000s 20.708us 1 1 100.00
gpio_same_csr_outstanding 1.060s 47.772us 1 1 100.00
gpio_csr_aliasing 1.250s 55.334us 1 1 100.00
gpio_csr_hw_reset 1.010s 15.658us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 1.000s 20.708us 1 1 100.00
gpio_same_csr_outstanding 1.060s 47.772us 1 1 100.00
gpio_csr_aliasing 1.250s 55.334us 1 1 100.00
gpio_csr_hw_reset 1.010s 15.658us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 2.300s 146.704us 1 1 100.00
gpio_sec_cm 1.360s 85.669us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 2.300s 146.704us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.860s 21.153us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 1.010s 2.804us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
gpio_inp_prd_cnt 0.920s 35.619us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:243) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 114789120432191349802121511237770174750854485040547111170443440172733247471678 572
UVM_INFO @ 1052439863 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1230) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 37834364874582011106100149726095030775681831385715522514988409415173949603233 89
UVM_INFO @ 2804383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---