| V1 |
|
100.00% |
| V2 |
|
94.12% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_smoke | 1 | 1 | 100.00 | |||
| xbar_smoke | 6.200s | 55.174us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_base_random_sequence | 1 | 1 | 100.00 | |||
| xbar_random | 85.410s | 373.476us | 1 | 1 | 100.00 | |
| xbar_random_delay | 6 | 6 | 100.00 | |||
| xbar_smoke_zero_delays | 5.210s | 54.651us | 1 | 1 | 100.00 | |
| xbar_smoke_large_delays | 278.980s | 173672.365us | 1 | 1 | 100.00 | |
| xbar_smoke_slow_rsp | 232.850s | 19631.823us | 1 | 1 | 100.00 | |
| xbar_random_zero_delays | 5.640s | 27.016us | 1 | 1 | 100.00 | |
| xbar_random_large_delays | 714.540s | 341511.850us | 1 | 1 | 100.00 | |
| xbar_random_slow_rsp | 559.670s | 61796.748us | 1 | 1 | 100.00 | |
| xbar_unmapped_address | 2 | 2 | 100.00 | |||
| xbar_unmapped_addr | 57.770s | 141.105us | 1 | 1 | 100.00 | |
| xbar_error_and_unmapped_addr | 106.260s | 2696.755us | 1 | 1 | 100.00 | |
| xbar_error_cases | 2 | 2 | 100.00 | |||
| xbar_error_random | 97.190s | 3689.483us | 1 | 1 | 100.00 | |
| xbar_error_and_unmapped_addr | 106.260s | 2696.755us | 1 | 1 | 100.00 | |
| xbar_all_access_same_device | 1 | 2 | 50.00 | |||
| xbar_access_same_device | 45.600s | 245.333us | 1 | 1 | 100.00 | |
| xbar_access_same_device_slow_rsp | 1805.460s | 600000.000us | 0 | 1 | 0.00 | |
| xbar_all_hosts_use_same_source_id | 1 | 1 | 100.00 | |||
| xbar_same_source | 16.160s | 504.919us | 1 | 1 | 100.00 | |
| xbar_stress_all | 2 | 2 | 100.00 | |||
| xbar_stress_all | 168.120s | 1509.590us | 1 | 1 | 100.00 | |
| xbar_stress_all_with_error | 724.120s | 30766.279us | 1 | 1 | 100.00 | |
| xbar_stress_with_reset | 2 | 2 | 100.00 | |||
| xbar_stress_all_with_rand_reset | 422.140s | 7784.603us | 1 | 1 | 100.00 | |
| xbar_stress_all_with_reset_error | 274.590s | 363.656us | 1 | 1 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | 1 test run | |||
| xbar_access_same_device_slow_rsp | 92849394103933022436806640418081003929453390603796608971410095863049556516242 | 180 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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