Simulation Results: otbn

 
16/09/2026 15:31:42 DVSim: v1.53.0 sha: aecc39b json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 91.24 %
  • code
  • 85.96 %
  • assert
  • 89.89 %
  • func
  • 97.88 %
  • block
  • 99.24 %
  • line
  • 99.45 %
  • branch
  • 94.47 %
  • toggle
  • 83.71 %
  • FSM
  • 66.20 %
Validation stages
V1
100.00%
V2
82.35%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 2 2 100.00
otbn_smoke 24.000s 73.099us 1 1 100.00
otbn_smoke_vectorized 11.000s 43.693us 1 1 100.00
single_binary 1 1 100.00
otbn_single 10.000s 112.454us 1 1 100.00
csr_hw_reset 1 1 100.00
otbn_csr_hw_reset 6.000s 59.441us 1 1 100.00
csr_rw 1 1 100.00
otbn_csr_rw 6.000s 18.075us 1 1 100.00
csr_bit_bash 1 1 100.00
otbn_csr_bit_bash 8.000s 48.272us 1 1 100.00
csr_aliasing 1 1 100.00
otbn_csr_aliasing 4.000s 46.705us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otbn_csr_mem_rw_with_rand_reset 9.000s 240.272us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otbn_csr_rw 6.000s 18.075us 1 1 100.00
otbn_csr_aliasing 4.000s 46.705us 1 1 100.00
mem_walk 1 1 100.00
otbn_mem_walk 137.000s 7404.769us 1 1 100.00
mem_partial_access 1 1 100.00
otbn_mem_partial_access 29.000s 322.750us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_recovery 1 1 100.00
otbn_reset 53.000s 132.031us 1 1 100.00
multi_error 1 1 100.00
otbn_multi_err 73.000s 1306.584us 1 1 100.00
wfi 0 3 0.00
otbn_wfi_smoke 7.000s 11.230us 0 1 0.00
otbn_wfi_sec_wipe 6.000s 8.753us 0 1 0.00
otbn_wfi_back_to_back 7.000s 18.864us 0 1 0.00
back_to_back 1 1 100.00
otbn_multi 74.000s 1188.827us 1 1 100.00
stress_all 1 1 100.00
otbn_stress_all 58.000s 405.342us 1 1 100.00
lc_escalation 1 1 100.00
otbn_escalate 10.000s 22.893us 1 1 100.00
zero_state_err_urnd 1 1 100.00
otbn_zero_state_err_urnd 9.000s 43.064us 1 1 100.00
sw_errs_fatal_chk 1 1 100.00
otbn_sw_errs_fatal_chk 24.000s 145.146us 1 1 100.00
alert_test 1 1 100.00
otbn_alert_test 7.000s 24.139us 1 1 100.00
intr_test 1 1 100.00
otbn_intr_test 5.000s 33.720us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otbn_tl_errors 6.000s 145.788us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otbn_tl_errors 6.000s 145.788us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otbn_csr_hw_reset 6.000s 59.441us 1 1 100.00
otbn_csr_rw 6.000s 18.075us 1 1 100.00
otbn_csr_aliasing 4.000s 46.705us 1 1 100.00
otbn_same_csr_outstanding 5.000s 45.424us 1 1 100.00
tl_d_partial_access 4 4 100.00
otbn_csr_hw_reset 6.000s 59.441us 1 1 100.00
otbn_csr_rw 6.000s 18.075us 1 1 100.00
otbn_csr_aliasing 4.000s 46.705us 1 1 100.00
otbn_same_csr_outstanding 5.000s 45.424us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mem_integrity 2 2 100.00
otbn_imem_err 15.000s 23.769us 1 1 100.00
otbn_dmem_err 13.000s 20.587us 1 1 100.00
internal_integrity 4 4 100.00
otbn_alu_bignum_mod_err 10.000s 21.721us 1 1 100.00
otbn_controller_ispr_rdata_err 21.000s 48.461us 1 1 100.00
otbn_mac_bignum_acc_err 12.000s 36.653us 1 1 100.00
otbn_urnd_err 9.000s 19.602us 1 1 100.00
illegal_bus_access 1 1 100.00
otbn_illegal_mem_acc 9.000s 29.632us 1 1 100.00
otbn_mem_gnt_acc_err 1 1 100.00
otbn_mem_gnt_acc_err 13.000s 14.137us 1 1 100.00
otbn_non_sec_partial_wipe 1 1 100.00
otbn_partial_wipe 8.000s 51.602us 1 1 100.00
tl_intg_err 2 2 100.00
otbn_sec_cm 643.000s 4324.772us 1 1 100.00
otbn_tl_intg_err 27.000s 233.662us 1 1 100.00
passthru_mem_tl_intg_err 1 1 100.00
otbn_passthru_mem_tl_intg_err 64.000s 816.980us 1 1 100.00
prim_fsm_check 1 1 100.00
otbn_sec_cm 643.000s 4324.772us 1 1 100.00
prim_count_check 1 1 100.00
otbn_sec_cm 643.000s 4324.772us 1 1 100.00
sec_cm_mem_scramble 1 1 100.00
otbn_smoke 24.000s 73.099us 1 1 100.00
sec_cm_data_mem_integrity 1 1 100.00
otbn_dmem_err 13.000s 20.587us 1 1 100.00
sec_cm_instruction_mem_integrity 1 1 100.00
otbn_imem_err 15.000s 23.769us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otbn_tl_intg_err 27.000s 233.662us 1 1 100.00
sec_cm_controller_fsm_global_esc 1 1 100.00
otbn_escalate 10.000s 22.893us 1 1 100.00
sec_cm_controller_fsm_local_esc 5 5 100.00
otbn_imem_err 15.000s 23.769us 1 1 100.00
otbn_dmem_err 13.000s 20.587us 1 1 100.00
otbn_zero_state_err_urnd 9.000s 43.064us 1 1 100.00
otbn_illegal_mem_acc 9.000s 29.632us 1 1 100.00
otbn_sec_cm 643.000s 4324.772us 1 1 100.00
sec_cm_controller_fsm_sparse 1 1 100.00
otbn_sec_cm 643.000s 4324.772us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
otbn_single 10.000s 112.454us 1 1 100.00
sec_cm_scramble_ctrl_fsm_local_esc 5 5 100.00
otbn_imem_err 15.000s 23.769us 1 1 100.00
otbn_dmem_err 13.000s 20.587us 1 1 100.00
otbn_zero_state_err_urnd 9.000s 43.064us 1 1 100.00
otbn_illegal_mem_acc 9.000s 29.632us 1 1 100.00
otbn_sec_cm 643.000s 4324.772us 1 1 100.00
sec_cm_scramble_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 643.000s 4324.772us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_global_esc 1 1 100.00
otbn_escalate 10.000s 22.893us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_local_esc 5 5 100.00
otbn_imem_err 15.000s 23.769us 1 1 100.00
otbn_dmem_err 13.000s 20.587us 1 1 100.00
otbn_zero_state_err_urnd 9.000s 43.064us 1 1 100.00
otbn_illegal_mem_acc 9.000s 29.632us 1 1 100.00
otbn_sec_cm 643.000s 4324.772us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 643.000s 4324.772us 1 1 100.00
sec_cm_data_reg_sw_sca 1 1 100.00
otbn_single 10.000s 112.454us 1 1 100.00
sec_cm_ctrl_redun 1 1 100.00
otbn_ctrl_redun 8.000s 96.147us 1 1 100.00
sec_cm_pc_ctrl_flow_redun 1 1 100.00
otbn_pc_ctrl_flow_redun 8.000s 43.283us 1 1 100.00
sec_cm_rnd_bus_consistency 1 1 100.00
otbn_rnd_sec_cm 86.000s 157.548us 1 1 100.00
sec_cm_rnd_rng_digest 1 1 100.00
otbn_rnd_sec_cm 86.000s 157.548us 1 1 100.00
sec_cm_rf_base_data_reg_sw_integrity 1 1 100.00
otbn_rf_base_intg_err 11.000s 23.045us 1 1 100.00
sec_cm_rf_base_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 643.000s 4324.772us 1 1 100.00
sec_cm_stack_wr_ptr_ctr_redun 1 1 100.00
otbn_sec_cm 643.000s 4324.772us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_integrity 1 1 100.00
otbn_rf_bignum_intg_err 14.000s 78.648us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 643.000s 4324.772us 1 1 100.00
sec_cm_loop_stack_ctr_redun 1 1 100.00
otbn_sec_cm 643.000s 4324.772us 1 1 100.00
sec_cm_loop_stack_addr_integrity 1 1 100.00
otbn_stack_addr_integ_chk 10.000s 21.845us 1 1 100.00
sec_cm_call_stack_addr_integrity 1 1 100.00
otbn_stack_addr_integ_chk 10.000s 21.845us 1 1 100.00
sec_cm_start_stop_ctrl_state_consistency 1 1 100.00
otbn_sec_wipe_err 6.000s 10.287us 1 1 100.00
sec_cm_data_mem_sec_wipe 1 1 100.00
otbn_single 10.000s 112.454us 1 1 100.00
sec_cm_instruction_mem_sec_wipe 1 1 100.00
otbn_single 10.000s 112.454us 1 1 100.00
sec_cm_data_reg_sw_sec_wipe 1 1 100.00
otbn_single 10.000s 112.454us 1 1 100.00
sec_cm_write_mem_integrity 1 1 100.00
otbn_multi 74.000s 1188.827us 1 1 100.00
sec_cm_ctrl_flow_count 1 1 100.00
otbn_single 10.000s 112.454us 1 1 100.00
sec_cm_ctrl_flow_sca 1 1 100.00
otbn_single 10.000s 112.454us 1 1 100.00
sec_cm_data_mem_sw_noaccess 1 1 100.00
otbn_sw_no_acc 24.000s 51.856us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
otbn_single 10.000s 112.454us 1 1 100.00
sec_cm_tlul_fifo_ctr_redun 1 1 100.00
otbn_sec_cm 643.000s 4324.772us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
otbn_stress_all_with_rand_reset 13.000s 26.723us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (otbn_scoreboard.sv:440) [scoreboard] Check failed model_status == * (* [*] vs * [*]) Saw instruction when not in BUSY_EXECUTE operational state. 2 test runs
otbn_wfi_smoke 99484828120431470595647125712444722330581588949443269336763846677663284512387 118
UVM_INFO @ 11230175 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_wfi_back_to_back 60909061007964573403986016126042924126068820961547333443157679463011474635014 123
UVM_INFO @ 18864245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 1 test run
otbn_stress_all_with_rand_reset 114413519352015885082540836272534116076582685039570135589370310047401560859840 149
UVM_INFO @ 26722681 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_env_cov.sv, Line: *):(Time: * PS + *) Sampled value (*) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@*_*.cur_cp) is an illegal value. 1 test run
otbn_wfi_sec_wipe 52111661011114874496212253121916341872478326691530207138134948674859661909514 117
UVM_FATAL @ 8752810 ps: (otbn_env_cov.sv:2728) [uvm_test_top.env.cov] Unknown encoding () for instruction `wfi'
UVM_INFO @ 8752810 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---