Simulation Results: ac_range_check

 
17/09/2026 15:31:44 DVSim: v1.53.0 sha: 18abe52 json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 82.92 %
  • code
  • 93.09 %
  • assert
  • 97.75 %
  • func
  • 57.93 %
  • block
  • 99.10 %
  • line
  • 99.93 %
  • branch
  • 98.24 %
  • toggle
  • 81.09 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 35.000s 8581.327us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 54.000s 21674.639us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 10.000s 86.655us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 10.000s 50.452us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 53.000s 2749.466us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 14.000s 535.547us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 11.000s 86.381us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 10.000s 50.452us 1 1 100.00
ac_range_check_csr_aliasing 14.000s 535.547us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 10.000s 48.273us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 48.000s 2953.937us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 166.000s 23936.288us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 9.000s 23.626us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 10.000s 22.780us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 6.000s 138.097us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 6.000s 138.097us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 10.000s 86.655us 1 1 100.00
ac_range_check_csr_rw 10.000s 50.452us 1 1 100.00
ac_range_check_csr_aliasing 14.000s 535.547us 1 1 100.00
ac_range_check_same_csr_outstanding 13.000s 190.275us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 10.000s 86.655us 1 1 100.00
ac_range_check_csr_rw 10.000s 50.452us 1 1 100.00
ac_range_check_csr_aliasing 14.000s 535.547us 1 1 100.00
ac_range_check_same_csr_outstanding 13.000s 190.275us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 26.000s 1790.130us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 26.000s 1790.130us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 26.000s 1790.130us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 26.000s 1790.130us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 81.000s 5642.703us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 10.000s 26.358us 1 1 100.00
ac_range_check_tl_intg_err 14.000s 372.591us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 331.000s 16709.929us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 46.000s 3092.051us 1 1 100.00