Simulation Results: mbx

 
17/09/2026 15:31:44 DVSim: v1.53.0 sha: 18abe52 json Branch: master Tool: xcelium [24.03-s007]
Coverage statistics
  • Total
  • 86.63 %
  • code
  • 87.85 %
  • assert
  • 97.53 %
  • func
  • 74.51 %
  • block
  • 95.48 %
  • line
  • 95.88 %
  • branch
  • 87.93 %
  • toggle
  • 79.74 %
Validation stages
V1
83.33%
V2
81.82%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_smoke 1 1 100.00
mbx_smoke 61.000s 22622.863us 1 1 100.00
csr_hw_reset 1 1 100.00
mbx_csr_hw_reset 1.000s 14.954us 1 1 100.00
csr_rw 1 1 100.00
mbx_csr_rw 1.000s 15.862us 1 1 100.00
csr_bit_bash 1 1 100.00
mbx_csr_bit_bash 4.000s 1007.903us 1 1 100.00
csr_aliasing 1 1 100.00
mbx_csr_aliasing 2.000s 38.674us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
mbx_csr_mem_rw_with_rand_reset 1.000s 1.254us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
mbx_csr_rw 1.000s 15.862us 1 1 100.00
mbx_csr_aliasing 2.000s 38.674us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_stress 1 1 100.00
mbx_stress 36.000s 1506.189us 1 1 100.00
mbx_max_activity 1 1 100.00
mbx_stress_zero_delays 143.000s 39361.682us 1 1 100.00
mbx_imbx_oob 0 1 0.00
mbx_imbx_oob 3.000s 232.111us 0 1 0.00
mbx_doe_intr_msg 1 1 100.00
mbx_doe_intr_msg 11.000s 1256.078us 1 1 100.00
alert_test 1 1 100.00
mbx_alert_test 1.000s 57.925us 1 1 100.00
intr_test 1 1 100.00
mbx_intr_test 1.000s 14.246us 1 1 100.00
tl_d_oob_addr_access 0 1 0.00
mbx_tl_errors 1.000s 2.818us 0 1 0.00
tl_d_illegal_access 0 1 0.00
mbx_tl_errors 1.000s 2.818us 0 1 0.00
tl_d_outstanding_access 4 4 100.00
mbx_csr_hw_reset 1.000s 14.954us 1 1 100.00
mbx_csr_rw 1.000s 15.862us 1 1 100.00
mbx_csr_aliasing 2.000s 38.674us 1 1 100.00
mbx_same_csr_outstanding 1.000s 87.474us 1 1 100.00
tl_d_partial_access 4 4 100.00
mbx_csr_hw_reset 1.000s 14.954us 1 1 100.00
mbx_csr_rw 1.000s 15.862us 1 1 100.00
mbx_csr_aliasing 2.000s 38.674us 1 1 100.00
mbx_same_csr_outstanding 1.000s 87.474us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
mbx_tl_intg_err 2.000s 489.556us 1 1 100.00
mbx_sec_cm 2.000s 13.222us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:773) scoreboard [scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted *, but saw *). 2 test runs
mbx_tl_errors 108074179954497688511001612357056500838066384223788386722125667437668808310779 85
TL item was: req: (cip_tl_seq_item@18558) { a_addr: 'ha8240ff4 a_data: 'hed693d12 a_mask: 'h8 a_size: 'h2 a_param: 'h0 a_source: 'h25 a_opcode: 'h1 a_user: 'h257c1 d_param: 'h0 d_source: 'h25 d_data: 'h0 d_size: 'h2 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h1caa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 2818029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
mbx_csr_mem_rw_with_rand_reset 81153801759545935457468373880065343508476927652639368046082830363116265244878 86
TL item was: req: (cip_tl_seq_item@17769) { a_addr: 'h9a635234 a_data: 'heb12d53c a_mask: 'h5 a_size: 'h2 a_param: 'h0 a_source: 'h5a a_opcode: 'h1 a_user: 'h2433f d_param: 'h0 d_source: 'h5a d_data: 'h0 d_size: 'h2 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h1caa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 1253902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (mbx_scoreboard.sv:537) [scoreboard] Check failed m_ib_data_q.size() != * (* [*] vs * [*]) No write data in WDATA register 1 test run
mbx_imbx_oob 64862805053841110508159852016923479419685474304019999848343971884835750967292 94
UVM_INFO @ 232110818 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---