Simulation Results: kmac/masked

 
10/03/2026 17:17:01 DVSim: v1.12.0 sha: 84d71dd json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 94.47 %
  • code
  • 90.74 %
  • assert
  • 97.98 %
  • func
  • 94.70 %
  • line
  • 99.02 %
  • branch
  • 96.83 %
  • cond
  • 94.04 %
  • toggle
  • 99.73 %
  • FSM
  • 64.08 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 3.200s 0.000us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.100s 0.000us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.870s 0.000us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 16.560s 0.000us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 3.110s 0.000us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.380s 0.000us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.870s 0.000us 1 1 100.00
kmac_csr_aliasing 3.110s 0.000us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.850s 0.000us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.200s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 2958.740s 0.000us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 170.210s 0.000us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1515.580s 0.000us 1 1 100.00
kmac_test_vectors_sha3_256 1885.510s 0.000us 1 1 100.00
kmac_test_vectors_sha3_384 1558.470s 0.000us 1 1 100.00
kmac_test_vectors_sha3_512 860.700s 0.000us 1 1 100.00
kmac_test_vectors_shake_128 140.820s 0.000us 1 1 100.00
kmac_test_vectors_shake_256 96.740s 0.000us 1 1 100.00
kmac_test_vectors_kmac 2.340s 0.000us 1 1 100.00
kmac_test_vectors_kmac_xof 3.000s 0.000us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 45.470s 0.000us 1 1 100.00
app 1 1 100.00
kmac_app 57.180s 0.000us 1 1 100.00
app_with_partial_data 1 1 100.00
kmac_app_with_partial_data 175.210s 0.000us 1 1 100.00
entropy_refresh 1 1 100.00
kmac_entropy_refresh 99.270s 0.000us 1 1 100.00
error 1 1 100.00
kmac_error 347.980s 0.000us 1 1 100.00
key_error 1 1 100.00
kmac_key_error 2.300s 0.000us 1 1 100.00
sideload_invalid 1 1 100.00
kmac_sideload_invalid 3.280s 0.000us 1 1 100.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 1.300s 0.000us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 23.770s 0.000us 1 1 100.00
entropy_ready_error 1 1 100.00
kmac_entropy_ready_error 44.270s 0.000us 1 1 100.00
lc_escalation 1 1 100.00
kmac_lc_escalation 7.160s 0.000us 1 1 100.00
stress_all 1 1 100.00
kmac_stress_all 609.300s 0.000us 1 1 100.00
intr_test 1 1 100.00
kmac_intr_test 0.860s 0.000us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 1.160s 0.000us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.190s 0.000us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.190s 0.000us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.100s 0.000us 1 1 100.00
kmac_csr_rw 0.870s 0.000us 1 1 100.00
kmac_csr_aliasing 3.110s 0.000us 1 1 100.00
kmac_same_csr_outstanding 2.510s 0.000us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.100s 0.000us 1 1 100.00
kmac_csr_rw 0.870s 0.000us 1 1 100.00
kmac_csr_aliasing 3.110s 0.000us 1 1 100.00
kmac_same_csr_outstanding 2.510s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 2.180s 0.000us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 2.180s 0.000us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 2.180s 0.000us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 2.180s 0.000us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.190s 0.000us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_tl_intg_err 4.110s 0.000us 1 1 100.00
kmac_sec_cm 40.520s 0.000us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 4.110s 0.000us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 7.160s 0.000us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 3.200s 0.000us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 45.470s 0.000us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 2.180s 0.000us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 40.520s 0.000us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 40.520s 0.000us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 40.520s 0.000us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 3.200s 0.000us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 7.160s 0.000us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 40.520s 0.000us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 1 1 100.00
kmac_mubi 177.120s 0.000us 1 1 100.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 3.200s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
kmac_stress_all_with_rand_reset 259.050s 0.000us 1 1 100.00