Simulation Results: pwrmgr

 
11/03/2026 18:08:48 DVSim: v1.14.0 sha: bb630fa json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 95.43 %
  • code
  • 94.34 %
  • assert
  • 96.08 %
  • func
  • 95.88 %
  • line
  • 98.92 %
  • branch
  • 95.42 %
  • cond
  • 93.35 %
  • toggle
  • 90.02 %
  • FSM
  • 94.00 %
Validation stages
V1
100.00%
V2
90.91%
V2S
52.94%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
pwrmgr_smoke 0.830s 0.000us 1 1 100.00
csr_hw_reset 1 1 100.00
pwrmgr_csr_hw_reset 0.770s 0.000us 1 1 100.00
csr_rw 1 1 100.00
pwrmgr_csr_rw 0.720s 0.000us 1 1 100.00
csr_bit_bash 1 1 100.00
pwrmgr_csr_bit_bash 2.400s 0.000us 1 1 100.00
csr_aliasing 1 1 100.00
pwrmgr_csr_aliasing 0.770s 0.000us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
pwrmgr_csr_mem_rw_with_rand_reset 1.160s 0.000us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
pwrmgr_csr_rw 0.720s 0.000us 1 1 100.00
pwrmgr_csr_aliasing 0.770s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
wakeup 1 1 100.00
pwrmgr_wakeup 1.120s 0.000us 1 1 100.00
control_clks 1 1 100.00
pwrmgr_wakeup 1.120s 0.000us 1 1 100.00
aborted_low_power 2 2 100.00
pwrmgr_aborted_low_power 0.630s 0.000us 1 1 100.00
pwrmgr_lowpower_invalid 0.630s 0.000us 1 1 100.00
reset 2 2 100.00
pwrmgr_reset 0.690s 0.000us 1 1 100.00
pwrmgr_reset_invalid 0.780s 0.000us 1 1 100.00
main_power_glitch_reset 1 1 100.00
pwrmgr_reset 0.690s 0.000us 1 1 100.00
reset_wakeup_race 1 1 100.00
pwrmgr_wakeup_reset 0.900s 0.000us 1 1 100.00
lowpower_wakeup_race 1 1 100.00
pwrmgr_lowpower_wakeup_race 1.160s 0.000us 1 1 100.00
disable_rom_integrity_check 0 1 0.00
pwrmgr_disable_rom_integrity_check 0.830s 0.000us 0 1 0.00
stress_all 0 1 0.00
pwrmgr_stress_all 2.980s 0.000us 0 1 0.00
intr_test 1 1 100.00
pwrmgr_intr_test 0.630s 0.000us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
pwrmgr_tl_errors 1.300s 0.000us 1 1 100.00
tl_d_illegal_access 1 1 100.00
pwrmgr_tl_errors 1.300s 0.000us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
pwrmgr_csr_hw_reset 0.770s 0.000us 1 1 100.00
pwrmgr_csr_rw 0.720s 0.000us 1 1 100.00
pwrmgr_csr_aliasing 0.770s 0.000us 1 1 100.00
pwrmgr_same_csr_outstanding 0.710s 0.000us 1 1 100.00
tl_d_partial_access 4 4 100.00
pwrmgr_csr_hw_reset 0.770s 0.000us 1 1 100.00
pwrmgr_csr_rw 0.720s 0.000us 1 1 100.00
pwrmgr_csr_aliasing 0.770s 0.000us 1 1 100.00
pwrmgr_same_csr_outstanding 0.710s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 0 2 0.00
pwrmgr_sec_cm 0.690s 0.000us 0 1 0.00
pwrmgr_tl_intg_err 0.620s 0.000us 0 1 0.00
prim_count_check 0 1 0.00
pwrmgr_sec_cm 0.690s 0.000us 0 1 0.00
prim_fsm_check 0 1 0.00
pwrmgr_sec_cm 0.690s 0.000us 0 1 0.00
sec_cm_bus_integrity 0 1 0.00
pwrmgr_tl_intg_err 0.620s 0.000us 0 1 0.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
pwrmgr_sec_cm_lc_ctrl_intersig_mubi 1.860s 0.000us 1 1 100.00
sec_cm_rom_ctrl_intersig_mubi 1 1 100.00
pwrmgr_wakeup_reset 0.900s 0.000us 1 1 100.00
sec_cm_rstmgr_intersig_mubi 1 1 100.00
pwrmgr_sec_cm_rstmgr_intersig_mubi 0.780s 0.000us 1 1 100.00
sec_cm_esc_rx_clk_bkgn_chk 1 1 100.00
pwrmgr_esc_clk_rst_malfunc 0.610s 0.000us 1 1 100.00
sec_cm_esc_rx_clk_local_esc 0 1 0.00
pwrmgr_sec_cm 0.690s 0.000us 0 1 0.00
sec_cm_fsm_sparse 0 1 0.00
pwrmgr_sec_cm 0.690s 0.000us 0 1 0.00
sec_cm_fsm_terminal 0 1 0.00
pwrmgr_sec_cm 0.690s 0.000us 0 1 0.00
sec_cm_ctrl_flow_global_esc 1 1 100.00
pwrmgr_global_esc 0.690s 0.000us 1 1 100.00
sec_cm_main_pd_rst_local_esc 1 1 100.00
pwrmgr_glitch 0.700s 0.000us 1 1 100.00
sec_cm_ctrl_config_regwen 1 1 100.00
pwrmgr_sec_cm_ctrl_config_regwen 0.640s 0.000us 1 1 100.00
sec_cm_wakeup_config_regwen 1 1 100.00
pwrmgr_csr_rw 0.720s 0.000us 1 1 100.00
sec_cm_reset_config_regwen 1 1 100.00
pwrmgr_csr_rw 0.720s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
escalation_timeout 0 1 0.00
pwrmgr_escalation_timeout 0.710s 0.000us 0 1 0.00
stress_all_with_rand_reset 1 1 100.00
pwrmgr_stress_all_with_rand_reset 6.600s 0.000us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (pwrmgr_sec_cm_checker_assert.sv:166) [ASSERT FAILED] EscClkStopEscTimeout_A
pwrmgr_escalation_timeout 62718654495112566613003743687552574566040816515866655930525867648984061488911 75
UVM_ERROR @ 329205912 ps: (pwrmgr_sec_cm_checker_assert.sv:166) [ASSERT FAILED] EscClkStopEscTimeout_A
UVM_INFO @ 329205912 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue
pwrmgr_disable_rom_integrity_check 21334683718423662846319067151950431656811866162273514405562978019180789848776 125
UVM_FATAL @ 1000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 1000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 1000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1022) virtual_sequencer [pwrmgr_common_vseq] expect alert:fatal_fault to fire
pwrmgr_sec_cm 5114506977160845388044146741839419409161700963955217765113300565568300195180 78
UVM_ERROR @ 6337972 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 6337972 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_tl_intg_err 60853031879380380593601756689840899993098610249712698536666986028023930103668 78
UVM_ERROR @ 9609839 ps: (cip_base_vseq.sv:1022) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.pwrmgr_common_vseq] expect alert:fatal_fault to fire
UVM_INFO @ 9609839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (pwrmgr_reset_vseq.sv:62) [pwrmgr_reset_vseq] wait timeout occurred!
pwrmgr_stress_all 17632458577624062309560421148265281332260500957969072872235856441404833926607 842
UVM_FATAL @ 13406141204 ps: (pwrmgr_reset_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.pwrmgr_reset_vseq] wait timeout occurred!
UVM_INFO @ 13406141204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---