Simulation Results: i2c

 
12/03/2026 17:23:11 DVSim: v1.14.2 sha: bbf86e0 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 84.88 %
  • code
  • 81.38 %
  • assert
  • 95.98 %
  • func
  • 77.27 %
  • line
  • 96.35 %
  • branch
  • 92.12 %
  • cond
  • 84.74 %
  • toggle
  • 89.66 %
  • FSM
  • 44.05 %
Validation stages
V1
100.00%
V2
89.80%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
host_smoke 1 1 100.00
i2c_host_smoke 15.120s 0.000us 1 1 100.00
target_smoke 1 1 100.00
i2c_target_smoke 8.170s 0.000us 1 1 100.00
csr_hw_reset 1 1 100.00
i2c_csr_hw_reset 0.740s 0.000us 1 1 100.00
csr_rw 1 1 100.00
i2c_csr_rw 0.740s 0.000us 1 1 100.00
csr_bit_bash 1 1 100.00
i2c_csr_bit_bash 2.170s 0.000us 1 1 100.00
csr_aliasing 1 1 100.00
i2c_csr_aliasing 1.790s 0.000us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
i2c_csr_mem_rw_with_rand_reset 1.060s 0.000us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
i2c_csr_rw 0.740s 0.000us 1 1 100.00
i2c_csr_aliasing 1.790s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_error_intr 0 1 0.00
i2c_host_error_intr 1.430s 0.000us 0 1 0.00
host_stress_all 0 1 0.00
i2c_host_stress_all 0.000s 0.000us 0 1 0.00
host_maxperf 1 1 100.00
i2c_host_perf 148.840s 0.000us 1 1 100.00
host_override 1 1 100.00
i2c_host_override 0.810s 0.000us 1 1 100.00
host_fifo_watermark 1 1 100.00
i2c_host_fifo_watermark 103.270s 0.000us 1 1 100.00
host_fifo_overflow 1 1 100.00
i2c_host_fifo_overflow 86.460s 0.000us 1 1 100.00
host_fifo_reset 3 3 100.00
i2c_host_fifo_reset_fmt 0.790s 0.000us 1 1 100.00
i2c_host_fifo_fmt_empty 7.200s 0.000us 1 1 100.00
i2c_host_fifo_reset_rx 6.600s 0.000us 1 1 100.00
host_fifo_full 1 1 100.00
i2c_host_fifo_full 121.060s 0.000us 1 1 100.00
host_timeout 1 1 100.00
i2c_host_stretch_timeout 16.740s 0.000us 1 1 100.00
i2c_host_mode_toggle 0 1 0.00
i2c_host_mode_toggle 2.840s 0.000us 0 1 0.00
target_glitch 0 1 0.00
i2c_target_glitch 1.810s 0.000us 0 1 0.00
target_stress_all 1 1 100.00
i2c_target_stress_all 47.620s 0.000us 1 1 100.00
target_maxperf 1 1 100.00
i2c_target_perf 4.270s 0.000us 1 1 100.00
target_fifo_empty 2 2 100.00
i2c_target_stress_rd 33.810s 0.000us 1 1 100.00
i2c_target_intr_smoke 6.480s 0.000us 1 1 100.00
target_fifo_reset 2 2 100.00
i2c_target_fifo_reset_acq 0.930s 0.000us 1 1 100.00
i2c_target_fifo_reset_tx 1.440s 0.000us 1 1 100.00
target_fifo_full 3 3 100.00
i2c_target_stress_wr 11.310s 0.000us 1 1 100.00
i2c_target_stress_rd 33.810s 0.000us 1 1 100.00
i2c_target_intr_stress_wr 2.060s 0.000us 1 1 100.00
target_timeout 1 1 100.00
i2c_target_timeout 4.300s 0.000us 1 1 100.00
target_clock_stretch 1 1 100.00
i2c_target_stretch 3.290s 0.000us 1 1 100.00
bad_address 1 1 100.00
i2c_target_bad_addr 3.980s 0.000us 1 1 100.00
target_mode_glitch 0 1 0.00
i2c_target_hrst 5.890s 0.000us 0 1 0.00
target_fifo_watermark 2 2 100.00
i2c_target_fifo_watermarks_acq 2.940s 0.000us 1 1 100.00
i2c_target_fifo_watermarks_tx 1.020s 0.000us 1 1 100.00
host_mode_config_perf 2 2 100.00
i2c_host_perf 148.840s 0.000us 1 1 100.00
i2c_host_perf_precise 2.420s 0.000us 1 1 100.00
host_mode_clock_stretching 1 1 100.00
i2c_host_stretch_timeout 16.740s 0.000us 1 1 100.00
target_mode_tx_stretch_ctrl 1 1 100.00
i2c_target_tx_stretch_ctrl 2.150s 0.000us 1 1 100.00
target_mode_nack_generation 3 3 100.00
i2c_target_nack_acqfull 2.050s 0.000us 1 1 100.00
i2c_target_nack_acqfull_addr 1.850s 0.000us 1 1 100.00
i2c_target_nack_txstretch 1.370s 0.000us 1 1 100.00
host_mode_halt_on_nak 1 1 100.00
i2c_host_may_nack 10.610s 0.000us 1 1 100.00
target_mode_smbus_maxlen 1 1 100.00
i2c_target_smbus_maxlen 1.730s 0.000us 1 1 100.00
alert_test 1 1 100.00
i2c_alert_test 0.800s 0.000us 1 1 100.00
intr_test 1 1 100.00
i2c_intr_test 0.630s 0.000us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
i2c_tl_errors 1.380s 0.000us 1 1 100.00
tl_d_illegal_access 1 1 100.00
i2c_tl_errors 1.380s 0.000us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
i2c_csr_hw_reset 0.740s 0.000us 1 1 100.00
i2c_csr_rw 0.740s 0.000us 1 1 100.00
i2c_csr_aliasing 1.790s 0.000us 1 1 100.00
i2c_same_csr_outstanding 0.800s 0.000us 1 1 100.00
tl_d_partial_access 4 4 100.00
i2c_csr_hw_reset 0.740s 0.000us 1 1 100.00
i2c_csr_rw 0.740s 0.000us 1 1 100.00
i2c_csr_aliasing 1.790s 0.000us 1 1 100.00
i2c_same_csr_outstanding 0.800s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
i2c_tl_intg_err 1.410s 0.000us 1 1 100.00
i2c_sec_cm 0.970s 0.000us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
i2c_tl_intg_err 1.410s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_stress_all_with_rand_reset 0 1 0.00
i2c_host_stress_all_with_rand_reset 24.330s 0.000us 0 1 0.00
target_error_intr 0 1 0.00
i2c_target_unexp_stop 1.070s 0.000us 0 1 0.00
target_stress_all_with_rand_reset 0 1 0.00
i2c_target_stress_all_with_rand_reset 13.580s 0.000us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between
i2c_host_error_intr 34622677896518941503852069984916598959461825794342370486598382732522320948305 118
UVM_ERROR @ 67457696 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
UVM_INFO @ 67457696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes
i2c_host_stress_all 110066236082636509057131717187583334472222196331950996649220838541086945562593 None
Job timed out after 60 minutes
UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between
i2c_target_glitch 100979055524845205895861956026306565252613434536573606375704709289862705744152 84
UVM_ERROR @ 428753096 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
UVM_INFO @ 428753096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*])
i2c_target_unexp_stop 87608636041768203149230283731741839174533558046527243512253865615409280854493 78
UVM_ERROR @ 17637737 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 32 [0x20])
UVM_INFO @ 17637737 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
i2c_target_hrst 16052537587687424187046434772118266738855099605116966879841453930383956702232 79
UVM_FATAL @ 10498721174 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
UVM_INFO @ 10498721174 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1236) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
i2c_host_stress_all_with_rand_reset 41754531492360283632762768317044280916330701842905044690373266973812271924298 92
UVM_ERROR @ 756007044 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 756007044 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
i2c_target_stress_all_with_rand_reset 38679932762473959012490038843232620810101450472886847133127158434859330600419 94
UVM_ERROR @ 987140551 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 987140551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
i2c_host_mode_toggle 60084289593286765639365028050340936270486453021494963454043009246600394199578 87
UVM_ERROR @ 188216265 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
--> EXP:
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